// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2021 Amlogic, Inc. All rights reserved. */ #include #include / { cpus { #address-cells = <2>; #size-cells = <0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a35"; reg = <0x0 0x0>; enable-method = "psci"; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a35"; reg = <0x0 0x1>; enable-method = "psci"; }; cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a35"; reg = <0x0 0x2>; enable-method = "psci"; }; cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a35"; reg = <0x0 0x3>; enable-method = "psci"; }; }; timer { compatible = "arm,armv8-timer"; interrupts = , , , ; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; xtal: xtal-clk { compatible = "fixed-clock"; clock-frequency = <24000000>; clock-output-names = "xtal"; #clock-cells = <0>; }; soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; gic: interrupt-controller@fff01000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x0 0xfff01000 0 0x1000>, <0x0 0xfff02000 0 0x2000>, <0x0 0xfff04000 0 0x2000>, <0x0 0xfff06000 0 0x2000>; interrupts = ; }; apb4: apb4@fe000000 { compatible = "simple-bus"; reg = <0x0 0xfe000000 0x0 0x480000>; #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; uart_B: serial@7a000 { compatible = "amlogic,meson-s4-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x7a000 0x0 0x18>; interrupts = ; status = "disabled"; clocks = <&xtal>, <&xtal>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; }; }; };