// SPDX-License-Identifier: GPL-2.0-only // // aw88261.h -- AW88261 ALSA SoC Audio driver // // Copyright (c) 2023 awinic Technology CO., LTD // // Author: Jimmy Zhang // Author: Weidong Wang // #ifndef __AW88261_H__ #define __AW88261_H__ #define AW88261_ID_REG (0x00) #define AW88261_SYSST_REG (0x01) #define AW88261_SYSINT_REG (0x02) #define AW88261_SYSINTM_REG (0x03) #define AW88261_SYSCTRL_REG (0x04) #define AW88261_SYSCTRL2_REG (0x05) #define AW88261_I2SCTRL1_REG (0x06) #define AW88261_I2SCTRL2_REG (0x07) #define AW88261_I2SCTRL3_REG (0x08) #define AW88261_DACCFG1_REG (0x09) #define AW88261_DACCFG2_REG (0x0A) #define AW88261_DACCFG3_REG (0x0B) #define AW88261_DACCFG4_REG (0x0C) #define AW88261_DACCFG5_REG (0x0D) #define AW88261_DACCFG6_REG (0x0E) #define AW88261_DACCFG7_REG (0x0F) #define AW88261_DACCFG8_REG (0x10) #define AW88261_PWMCTRL1_REG (0x11) #define AW88261_PWMCTRL2_REG (0x12) #define AW88261_I2SCFG1_REG (0x13) #define AW88261_DBGCTRL_REG (0x14) #define AW88261_DACCFG9_REG (0x15) #define AW88261_DACCFG10_REG (0x16) #define AW88261_DACST_REG (0x20) #define AW88261_VBAT_REG (0x21) #define AW88261_TEMP_REG (0x22) #define AW88261_PVDD_REG (0x23) #define AW88261_ISNDAT_REG (0x24) #define AW88261_VSNDAT_REG (0x25) #define AW88261_I2SINT_REG (0x26) #define AW88261_I2SCAPCNT_REG (0x27) #define AW88261_ANASTA1_REG (0x28) #define AW88261_ANASTA2_REG (0x29) #define AW88261_ANASTA3_REG (0x2A) #define AW88261_TESTDET_REG (0x2B) #define AW88261_DSMCFG1_REG (0x30) #define AW88261_DSMCFG2_REG (0x31) #define AW88261_DSMCFG3_REG (0x32) #define AW88261_DSMCFG4_REG (0x33) #define AW88261_DSMCFG5_REG (0x34) #define AW88261_DSMCFG6_REG (0x35) #define AW88261_DSMCFG7_REG (0x36) #define AW88261_DSMCFG8_REG (0x37) #define AW88261_TESTIN_REG (0x38) #define AW88261_TESTOUT_REG (0x39) #define AW88261_SADCCTRL1_REG (0x3A) #define AW88261_SADCCTRL2_REG (0x3B) #define AW88261_SADCCTRL3_REG (0x3C) #define AW88261_SADCCTRL4_REG (0x3D) #define AW88261_SADCCTRL5_REG (0x3E) #define AW88261_SADCCTRL6_REG (0x3F) #define AW88261_SADCCTRL7_REG (0x40) #define AW88261_VSNTM1_REG (0x50) #define AW88261_VSNTM2_REG (0x51) #define AW88261_ISNCTRL1_REG (0x52) #define AW88261_ISNCTRL2_REG (0x53) #define AW88261_PLLCTRL1_REG (0x54) #define AW88261_PLLCTRL2_REG (0x55) #define AW88261_PLLCTRL3_REG (0x56) #define AW88261_CDACTRL1_REG (0x57) #define AW88261_CDACTRL2_REG (0x58) #define AW88261_DITHERCFG1_REG (0x59) #define AW88261_DITHERCFG2_REG (0x5A) #define AW88261_DITHERCFG3_REG (0x5B) #define AW88261_CPCTRL_REG (0x5C) #define AW88261_BSTCTRL1_REG (0x60) #define AW88261_BSTCTRL2_REG (0x61) #define AW88261_BSTCTRL3_REG (0x62) #define AW88261_BSTCTRL4_REG (0x63) #define AW88261_BSTCTRL5_REG (0x64) #define AW88261_BSTCTRL6_REG (0x65) #define AW88261_BSTCTRL7_REG (0x66) #define AW88261_BSTCTRL8_REG (0x67) #define AW88261_BSTCTRL9_REG (0x68) #define AW88261_TM_REG (0x6F) #define AW88261_TESTCTRL1_REG (0x70) #define AW88261_TESTCTRL2_REG (0x71) #define AW88261_EFCTRL1_REG (0x72) #define AW88261_EFCTRL2_REG (0x73) #define AW88261_EFWH_REG (0x74) #define AW88261_EFWM2_REG (0x75) #define AW88261_EFWM1_REG (0x76) #define AW88261_EFWL_REG (0x77) #define AW88261_EFRH4_REG (0x78) #define AW88261_EFRH3_REG (0x79) #define AW88261_EFRH2_REG (0x7A) #define AW88261_EFRH1_REG (0x7B) #define AW88261_EFRL4_REG (0x7C) #define AW88261_EFRL3_REG (0x7D) #define AW88261_EFRL2_REG (0x7E) #define AW88261_EFRL1_REG (0x7F) #define AW88261_REG_MAX (0x80) #define AW88261_EF_DBMD_MASK (0xfff7) #define AW88261_OR_VALUE (0x0008) #define AW88261_TEMH_MASK (0x83ff) #define AW88261_TEML_MASK (0x83ff) #define AW88261_DEFAULT_CFG (0x0000) #define AW88261_ICALK_SHIFT (0) #define AW88261_ICALKL_SHIFT (0) #define AW88261_VCALK_SHIFT (0) #define AW88261_VCALKL_SHIFT (0) #define AW88261_AMPPD_START_BIT (1) #define AW88261_AMPPD_BITS_LEN (1) #define AW88261_AMPPD_MASK \ (~(((1<> AW88261_VOL_6DB_START) * \ AW88261_VOLUME_STEP_DB) + \ ((value) & AW88261_REG_TO_DB)) #define DB_TO_REG_VAL(value) ((((value) / AW88261_VOLUME_STEP_DB) << \ AW88261_VOL_6DB_START) + \ ((value) % AW88261_VOLUME_STEP_DB)) #define AW88261_PROFILE_EXT(xname, profile_info, profile_get, profile_set) \ { \ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .info = profile_info, \ .get = profile_get, \ .put = profile_set, \ } enum { AW88261_SYNC_START = 0, AW88261_ASYNC_START, }; enum aw88261_id { AW88261_CHIP_ID = 0x2113, }; enum { AW88261_500_US = 500, AW88261_1000_US = 1000, AW88261_2000_US = 2000, }; enum { AW88261_DEV_PW_OFF = 0, AW88261_DEV_PW_ON, }; enum { AW88261_DEV_FW_FAILED = 0, AW88261_DEV_FW_OK, }; enum { AW88261_EF_AND_CHECK = 0, AW88261_EF_OR_CHECK, }; enum { AW88261_FRCSET_DISABLE = 0, AW88261_FRCSET_ENABLE, }; struct aw88261 { struct aw_device *aw_pa; struct mutex lock; struct gpio_desc *reset_gpio; struct delayed_work start_work; struct regmap *regmap; struct aw_container *aw_cfg; int efuse_check; int frcset_en; unsigned int mute_st; unsigned int amppd_st; bool phase_sync; }; #endif