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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 BayLibre, SAS
%YAML 1.2
---
$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
maintainers:
- Neil Armstrong <narmstrong@baylibre.com>
description: |
The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
only.
A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
The DWC3 Glue controls the PHY routing and power, an interrupt line is
connected to the Glue to serve as OTG ID change detection.
The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
host-only mode.
The Amlogic GXL & GXM SoCs doesn't embed an USB3 PHY.
properties:
compatible:
enum:
- amlogic,meson-gxl-usb-ctrl
- amlogic,meson-gxm-usb-ctrl
- amlogic,meson-g12a-usb-ctrl
- amlogic,meson-a1-usb-ctrl
ranges: true
"#address-cells":
enum: [ 1, 2 ]
"#size-cells":
enum: [ 1, 2 ]
clocks:
minItems: 1
maxItems: 3
clock-names:
minItems: 1
maxItems: 3
resets:
minItems: 1
reg:
maxItems: 1
interrupts:
maxItems: 1
phy-names:
minItems: 1
maxItems: 3
phys:
minItems: 1
maxItems: 3
dr_mode: true
power-domains:
maxItems: 1
vbus-supply:
description: VBUS power supply when used in OTG switchable mode
patternProperties:
"^usb@[0-9a-f]+$":
type: object
additionalProperties: false
required:
- compatible
- "#address-cells"
- "#size-cells"
- ranges
- clocks
- resets
- reg
- interrupts
- phy-names
- phys
- dr_mode
allOf:
- if:
properties:
compatible:
enum:
- amlogic,meson-g12a-usb-ctrl
then:
properties:
phy-names:
items:
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
- const: usb3-phy0 # USB3 PHY if USB3_0 is used
- if:
properties:
compatible:
enum:
- amlogic,meson-gxl-usb-ctrl
then:
properties:
clocks:
minItems: 2
clock-names:
items:
- const: usb_ctrl
- const: ddr
phy-names:
items:
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
required:
- clock-names
- if:
properties:
compatible:
enum:
- amlogic,meson-gxm-usb-ctrl
then:
properties:
clocks:
minItems: 2
clock-names:
items:
- const: usb_ctrl
- const: ddr
phy-names:
items:
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
- const: usb2-phy2 # USB2 PHY2 if USBOTG_C port is used
required:
- clock-names
- if:
properties:
compatible:
enum:
- amlogic,meson-a1-usb-ctrl
then:
properties:
phy-names:
items:
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
clocks:
minItems: 3
clock-names:
items:
- const: usb_ctrl
- const: usb_bus
- const: xtal_usb_ctrl
required:
- clock-names
examples:
- |
usb: usb@ffe09000 {
compatible = "amlogic,meson-g12a-usb-ctrl";
reg = <0xffe09000 0xa0>;
interrupts = <16>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&clkc_usb>;
resets = <&reset_usb>;
dr_mode = "otg";
phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>;
phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
dwc2: usb@ff400000 {
compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
reg = <0xff400000 0x40000>;
interrupts = <31>;
clocks = <&clkc_usb1>;
clock-names = "otg";
phys = <&usb2_phy1>;
dr_mode = "peripheral";
g-rx-fifo-size = <192>;
g-np-tx-fifo-size = <128>;
g-tx-fifo-size = <128 128 16 16 16>;
};
dwc3: usb@ff500000 {
compatible = "snps,dwc3";
reg = <0xff500000 0x100000>;
interrupts = <30>;
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,quirk-frame-length-adjustment;
};
};
|
