path: root/drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_4_regs.h

/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright 2016-2018 HabanaLabs, Ltd.
 * All Rights Reserved.
 *
 */

/************************************
 ** This is an auto-generated file **
 **       DO NOT EDIT BELOW        **
 ************************************/

#ifndef ASIC_REG_SIF_RTR_CTRL_4_REGS_H_
#define ASIC_REG_SIF_RTR_CTRL_4_REGS_H_

/*
 *****************************************
 *   SIF_RTR_CTRL_4 (Prototype: RTR_CTRL)
 *****************************************
 */

#define mmSIF_RTR_CTRL_4_PERM_SEL                                    0x346108

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_0                               0x346114

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_1                               0x346118

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_2                               0x34611C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_3                               0x346120

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_4                               0x346124

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_5                               0x346128

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_6                               0x34612C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_7                               0x346130

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_8                               0x346134

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_9                               0x346138

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_10                              0x34613C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_11                              0x346140

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_12                              0x346144

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_13                              0x346148

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_14                              0x34614C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_15                              0x346150

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_16                              0x346154

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_17                              0x346158

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_18                              0x34615C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_19                              0x346160

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_20                              0x346164

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_21                              0x346168

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_22                              0x34616C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_23                              0x346170

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_24                              0x346174

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_25                              0x346178

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_26                              0x34617C

#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_27                              0x346180

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_0                              0x346184

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_1                              0x346188

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_2                              0x34618C

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_3                              0x346190

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_4                              0x346194

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_5                              0x346198

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_6                              0x34619C

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_7                              0x3461A0

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_8                              0x3461A4

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_9                              0x3461A8

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_10                             0x3461AC

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_11                             0x3461B0

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_12                             0x3461B4

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_13                             0x3461B8

#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_14                             0x3461BC

#define mmSIF_RTR_CTRL_4_SCRAM_SRAM_EN                               0x34626C

#define mmSIF_RTR_CTRL_4_RL_HBM_EN                                   0x346274

#define mmSIF_RTR_CTRL_4_RL_HBM_SAT                                  0x346278

#define mmSIF_RTR_CTRL_4_RL_HBM_RST                                  0x34627C

#define mmSIF_RTR_CTRL_4_RL_HBM_TIMEOUT                              0x346280

#define mmSIF_RTR_CTRL_4_SCRAM_HBM_EN                                0x346284

#define mmSIF_RTR_CTRL_4_RL_PCI_EN                                   0x346288

#define mmSIF_RTR_CTRL_4_RL_PCI_SAT                                  0x34628C

#define mmSIF_RTR_CTRL_4_RL_PCI_RST                                  0x346290

#define mmSIF_RTR_CTRL_4_RL_PCI_TIMEOUT                              0x346294

#define mmSIF_RTR_CTRL_4_RL_SRAM_EN                                  0x34629C

#define mmSIF_RTR_CTRL_4_RL_SRAM_SAT                                 0x3462A0

#define mmSIF_RTR_CTRL_4_RL_SRAM_RST                                 0x3462A4

#define mmSIF_RTR_CTRL_4_RL_SRAM_TIMEOUT                             0x3462AC

#define mmSIF_RTR_CTRL_4_RL_SRAM_RED                                 0x3462B4

#define mmSIF_RTR_CTRL_4_E2E_HBM_EN                                  0x3462EC

#define mmSIF_RTR_CTRL_4_E2E_PCI_EN                                  0x3462F0

#define mmSIF_RTR_CTRL_4_E2E_HBM_WR_SIZE                             0x3462F4

#define mmSIF_RTR_CTRL_4_E2E_PCI_WR_SIZE                             0x3462F8

#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_SET_EN                       0x346404

#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_SET                          0x346408

#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_WRAP                         0x34640C

#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_CNT                          0x346410

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM_CTR_SET_EN                       0x346414

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM_CTR_SET                          0x346418

#define mmSIF_RTR_CTRL_4_E2E_HBM_RD_SIZE                             0x34641C

#define mmSIF_RTR_CTRL_4_E2E_PCI_RD_SIZE                             0x346420

#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_SET_EN                       0x346424

#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_SET                          0x346428

#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_WRAP                         0x34642C

#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_CNT                          0x346430

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM_CTR_SET_EN                       0x346434

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM_CTR_SET                          0x346438

#define mmSIF_RTR_CTRL_4_NL_HBM_SEL_0                                0x346450

#define mmSIF_RTR_CTRL_4_NL_HBM_SEL_1                                0x346454

#define mmSIF_RTR_CTRL_4_NON_LIN_EN                                  0x346480

#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_0                              0x346500

#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_1                              0x346504

#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_2                              0x346508

#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_3                              0x34650C

#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_4                              0x346510

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_0                            0x346514

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_1                            0x346520

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_2                            0x346524

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_3                            0x346528

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_4                            0x34652C

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_5                            0x346530

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_6                            0x346534

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_7                            0x346538

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_8                            0x34653C

#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_9                            0x346540

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_0                             0x346550

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_1                             0x346554

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_2                             0x346558

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_3                             0x34655C

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_4                             0x346560

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_5                             0x346564

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_6                             0x346568

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_7                             0x34656C

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_8                             0x346570

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_9                             0x346574

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_10                            0x346578

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_11                            0x34657C

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_12                            0x346580

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_13                            0x346584

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_14                            0x346588

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_15                            0x34658C

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_16                            0x346590

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_17                            0x346594

#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_18                            0x346598

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_0                     0x3465E4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_1                     0x3465E8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_2                     0x3465EC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_3                     0x3465F0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_4                     0x3465F4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_5                     0x3465F8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_6                     0x3465FC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_7                     0x346600

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_8                     0x346604

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_9                     0x346608

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_10                    0x34660C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_11                    0x346610

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_12                    0x346614

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_13                    0x346618

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_14                    0x34661C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_15                    0x346620

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_0                    0x346624

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_1                    0x346628

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_2                    0x34662C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_3                    0x346630

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_4                    0x346634

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_5                    0x346638

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_6                    0x34663C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_7                    0x346640

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_8                    0x346644

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_9                    0x346648

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_10                   0x34664C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_11                   0x346650

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_12                   0x346654

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_13                   0x346658

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_14                   0x34665C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_15                   0x346660

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_0                     0x346664

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_1                     0x346668

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_2                     0x34666C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_3                     0x346670

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_4                     0x346674

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_5                     0x346678

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_6                     0x34667C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_7                     0x346680

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_8                     0x346684

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_9                     0x346688

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_10                    0x34668C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_11                    0x346690

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_12                    0x346694

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_13                    0x346698

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_14                    0x34669C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_15                    0x3466A0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_0                    0x3466A4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_1                    0x3466A8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_2                    0x3466AC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_3                    0x3466B0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_4                    0x3466B4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_5                    0x3466B8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_6                    0x3466BC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_7                    0x3466C0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_8                    0x3466C4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_9                    0x3466C8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_10                   0x3466CC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_11                   0x3466D0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_12                   0x3466D4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_13                   0x3466D8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_14                   0x3466DC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_15                   0x3466E0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_0                    0x3466E4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_1                    0x3466E8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_2                    0x3466EC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_3                    0x3466F0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_4                    0x3466F4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_5                    0x3466F8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_6                    0x3466FC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_7                    0x346700

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_8                    0x346704

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_9                    0x346708

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_10                   0x34670C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_11                   0x346710

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_12                   0x346714

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_13                   0x346718

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_14                   0x34671C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_15                   0x346720

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_0                   0x346724

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_1                   0x346728

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_2                   0x34672C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_3                   0x346730

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_4                   0x346734

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_5                   0x346738

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_6                   0x34673C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_7                   0x346740

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_8                   0x346744

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_9                   0x346748

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_10                  0x34674C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_11                  0x346750

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_12                  0x346754

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_13                  0x346758

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_14                  0x34675C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_15                  0x346760

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_0                    0x346764

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_1                    0x346768

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_2                    0x34676C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_3                    0x346770

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_4                    0x346774

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_5                    0x346778

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_6                    0x34677C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_7                    0x346780

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_8                    0x346784

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_9                    0x346788

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_10                   0x34678C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_11                   0x346790

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_12                   0x346794

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_13                   0x346798

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_14                   0x34679C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_15                   0x3467A0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_0                   0x3467A4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_1                   0x3467A8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_2                   0x3467AC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_3                   0x3467B0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_4                   0x3467B4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_5                   0x3467B8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_6                   0x3467BC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_7                   0x3467C0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_8                   0x3467C4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_9                   0x3467C8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_10                  0x3467CC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_11                  0x3467D0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_12                  0x3467D4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_13                  0x3467D8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_14                  0x3467DC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_15                  0x3467E0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_0                     0x346824

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_1                     0x346828

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_2                     0x34682C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_3                     0x346830

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_4                     0x346834

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_5                     0x346838

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_6                     0x34683C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_7                     0x346840

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_8                     0x346844

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_9                     0x346848

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_10                    0x34684C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_11                    0x346850

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_12                    0x346854

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_13                    0x346858

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_14                    0x34685C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_15                    0x346860

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_0                    0x346864

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_1                    0x346868

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_2                    0x34686C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_3                    0x346870

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_4                    0x346874

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_5                    0x346878

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_6                    0x34687C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_7                    0x346880

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_8                    0x346884

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_9                    0x346888

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_10                   0x34688C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_11                   0x346890

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_12                   0x346894

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_13                   0x346898

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_14                   0x34689C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_15                   0x3468A0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_0                     0x3468A4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_1                     0x3468A8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_2                     0x3468AC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_3                     0x3468B0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_4                     0x3468B4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_5                     0x3468B8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_6                     0x3468BC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_7                     0x3468C0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_8                     0x3468C4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_9                     0x3468C8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_10                    0x3468CC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_11                    0x3468D0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_12                    0x3468D4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_13                    0x3468D8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_14                    0x3468DC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_15                    0x3468E0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_0                    0x3468E4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_1                    0x3468E8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_2                    0x3468EC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_3                    0x3468F0

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_4                    0x3468F4

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_5                    0x3468F8

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_6                    0x3468FC

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_7                    0x346900

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_8                    0x346904

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_9                    0x346908

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_10                   0x34690C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_11                   0x346910

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_12                   0x346914

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_13                   0x346918

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_14                   0x34691C

#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_15                   0x346920

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_0                    0x346924

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_1                    0x346928

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_2                    0x34692C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_3                    0x346930

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_4                    0x346934

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_5                    0x346938

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_6                    0x34693C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_7                    0x346940

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_8                    0x346944

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_9                    0x346948

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_10                   0x34694C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_11                   0x346950

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_12                   0x346954

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_13                   0x346958

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_14                   0x34695C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_15                   0x346960

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_0                   0x346964

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_1                   0x346968

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_2                   0x34696C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_3                   0x346970

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_4                   0x346974

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_5                   0x346978

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_6                   0x34697C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_7                   0x346980

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_8                   0x346984

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_9                   0x346988

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_10                  0x34698C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_11                  0x346990

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_12                  0x346994

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_13                  0x346998

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_14                  0x34699C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_15                  0x3469A0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_0                    0x3469A4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_1                    0x3469A8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_2                    0x3469AC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_3                    0x3469B0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_4                    0x3469B4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_5                    0x3469B8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_6                    0x3469BC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_7                    0x3469C0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_8                    0x3469C4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_9                    0x3469C8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_10                   0x3469CC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_11                   0x3469D0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_12                   0x3469D4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_13                   0x3469D8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_14                   0x3469DC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_15                   0x3469E0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_0                   0x3469E4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_1                   0x3469E8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_2                   0x3469EC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_3                   0x3469F0

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_4                   0x3469F4

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_5                   0x3469F8

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_6                   0x3469FC

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_7                   0x346A00

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_8                   0x346A04

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_9                   0x346A08

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_10                  0x346A0C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_11                  0x346A10

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_12                  0x346A14

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_13                  0x346A18

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_14                  0x346A1C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_15                  0x346A20

#define mmSIF_RTR_CTRL_4_RANGE_SEC_HIT_AW                            0x346A64

#define mmSIF_RTR_CTRL_4_RANGE_SEC_HIT_AR                            0x346A68

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_HIT_AW                           0x346A6C

#define mmSIF_RTR_CTRL_4_RANGE_PRIV_HIT_AR                           0x346A70

#define mmSIF_RTR_CTRL_4_RGL_CFG                                     0x346B64

#define mmSIF_RTR_CTRL_4_RGL_SHIFT                                   0x346B68

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_0                          0x346B6C

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_1                          0x346B70

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_2                          0x346B74

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_3                          0x346B78

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_4                          0x346B7C

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_5                          0x346B80

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_6                          0x346B84

#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_7                          0x346B88

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_0                                 0x346BAC

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_1                                 0x346BB0

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_2                                 0x346BB4

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_3                                 0x346BB8

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_4                                 0x346BBC

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_5                                 0x346BC0

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_6                                 0x346BC4

#define mmSIF_RTR_CTRL_4_RGL_TOKEN_7                                 0x346BC8

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_0                               0x346BEC

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_1                               0x346BF0

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_2                               0x346BF4

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_3                               0x346BF8

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_4                               0x346BFC

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_5                               0x346C00

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_6                               0x346C04

#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_7                               0x346C08

#define mmSIF_RTR_CTRL_4_RGL_WDT                                     0x346C2C

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH0_CTR_WRAP                    0x346C30

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH1_CTR_WRAP                    0x346C34

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH0_CTR_WRAP                    0x346C38

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH1_CTR_WRAP                    0x346C3C

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH0_CTR_WRAP                    0x346C40

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH1_CTR_WRAP                    0x346C44

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH0_CTR_WRAP                    0x346C48

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH1_CTR_WRAP                    0x346C4C

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH0_CTR_CNT                     0x346C50

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH1_CTR_CNT                     0x346C54

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH0_CTR_CNT                     0x346C58

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH1_CTR_CNT                     0x346C5C

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH0_CTR_CNT                     0x346C60

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH1_CTR_CNT                     0x346C64

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH0_CTR_CNT                     0x346C68

#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH1_CTR_CNT                     0x346C6C

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH0_CTR_WRAP                    0x346C70

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH1_CTR_WRAP                    0x346C74

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH0_CTR_WRAP                    0x346C78

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH1_CTR_WRAP                    0x346C7C

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH0_CTR_WRAP                    0x346C80

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH1_CTR_WRAP                    0x346C84

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH0_CTR_WRAP                    0x346C88

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH1_CTR_WRAP                    0x346C8C

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH0_CTR_CNT                     0x346C90

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH1_CTR_CNT                     0x346C94

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH0_CTR_CNT                     0x346C98

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH1_CTR_CNT                     0x346C9C

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH0_CTR_CNT                     0x346CA0

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH1_CTR_CNT                     0x346CA4

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH0_CTR_CNT                     0x346CA8

#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH1_CTR_CNT                     0x346CAC

#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_0                             0x346CB0

#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_1                             0x346CB4

#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_2                             0x346CB8

#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_3                             0x346CBC

#endif /* ASIC_REG_SIF_RTR_CTRL_4_REGS_H_ */