wireguard-openbsd/gnu/llvm/lib/Target/Mips, branch jd/queueboostsWireGuard implementation for the OpenBSD kernelhttps://git.zx2c4.com/wireguard-openbsd/atom/gnu/llvm/lib/Target/Mips?h=jd%2Fqueueboosts2020-05-23T07:18:50ZUse a distinct trap code with retguard on mips64.2020-05-23T07:18:50Zvisavisa@openbsd.org2020-05-23T07:18:50Zurn:sha1:59447aca8d09daa7e01d4745dffe3b139396b8c7
This lets the kernel detect retguard traps and send SIGABRT instead
of SIGEMT.
SIGEMT does not indicate correctly the nature of the error (stack
overflow, violation of control flow). It can confuse the user to restart
the program without further investigation.
Prompted by and OK deraadt@
OK mortimer@
Add retguard for octeon/mips64.2019-10-25T00:40:56Zmortimermortimer@openbsd.org2019-10-25T00:40:56Zurn:sha1:52446778f86252aa4533d0b08b871472df4e84f6
For this architecture we use separate retguard prologue and epilogue code
for static or PIC code. In the PIC case we use some additional code before
the retguard epilogue to recover the function start address and the GOT
pointer in order to get the per-function random cookie. Much thanks to
visa@ for suggestions and advice making it all work.
ok deraadt@ visa@
Merge LLVM 8.0.1 release.2019-09-01T16:37:21Zpatrickpatrick@openbsd.org2019-09-01T16:37:21Zurn:sha1:d3df0c01b52bb561f932539d0321079fcb70e869
Tested in snaps and package builds
Tested on amd64 by naddy@
Tested on arm64 by patrick@
Tested on octeon by visa@
Import LLVM 8.0.1 release including clang, lld and lldb.2019-09-01T16:27:59Zpatrickpatrick@openbsd.org2019-09-01T16:27:59Zurn:sha1:b19884b112052f3bf5ff9551374fbd840e2339f2Address a few issues in the expansion of li.d and li.s:2019-07-28T13:25:25Zvisavisa@openbsd.org2019-07-28T13:25:25Zurn:sha1:63f1d51ba3485ee31405eafae8f0bd217f1ee7b2
- In the N64 mode, properly load the whole immediate value
in the destination register even if the lower 32 bits are zero.
- Ensure correct alignment of memory operands.
- Fix the endianess of memory operands.
Fix instruction guard. This prevents the compiler from using2019-07-08T05:04:38Zvisavisa@openbsd.org2019-07-08T05:04:38Zurn:sha1:8f05d8533ea8eed23c7119ca1b6dc65faf92bccf
the MIPS64 mul instruction on pre-MIPS64 subtargets.
Implement the 'h' register constraint on mips64. This lets clang build2019-07-01T15:15:53Zvisavisa@openbsd.org2019-07-01T15:15:53Zurn:sha1:7c158015691a62568a49a2186cab232e1c7050e1
pieces of software that use the constraint if the compiler claims
to be compatible with GCC 4.2.1.
Note that the constraint was removed in GCC 4.4. The reason was that
'h' could generate code whose result is unpredictable. The underlying
reason is that the HI and LO registers are special, and the optimizer
has to be careful when choosing the order of HI/LO accesses. It looks
that LLVM has the needed logic.
Implement .cplocal directive. Needed when building libcrypto.2019-06-24T13:52:18Zvisavisa@openbsd.org2019-06-24T13:52:18Zurn:sha1:6bb883ca97d62a98da45e1914cb06a260a941487Implement SGE pseudo-instructions. Needed when building libcrypto.2019-06-24T13:47:33Zvisavisa@openbsd.org2019-06-24T13:47:33Zurn:sha1:916170da4f9e366db2414e3444ff6f9016c88333Fix a bug in memory operand handling. If a load or store uses a symbol2019-06-24T13:44:21Zvisavisa@openbsd.org2019-06-24T13:44:21Zurn:sha1:0957d38e5774f24187df9ed4c2808ccaef8591ca
as a memory operand, the assembler generates incorrect relocations in
PIC mode. As a simple fix, expand the instruction into an address load
sequence, which works, that is followed by the actual memory
instruction.
Note that the generated sequence is not always optimal. If the symbol
has a small offset, the offset could be fused with the memory
instruction. The fix does not achieve that, however. A symbol offset
adds an extra instruction.