wireguard-openbsd/lib/libc/arch/arm, branch jd/queueboosts

Anthony Steinhauser reports that 32-bit arm cpus have the same speculation

2020-03-13T09:31:24Z

problems as 64-bit models. To resolve the syscall speculation, as a first step "nop; nop" was added after all occurances of the syscall ("swi 0") instruction. Then the kernel was changed to jump over the 2 extra instructions. In this final step, those pair of nops are converted into the speculation-blocking sequence ("dsb nsh; isb"). Don't try to build through these multiple steps, use a snapshot instead. Packages matching the new ABI will be out in a while... ok kettenis

Anthony Steinhauser reports that 32-bit arm cpus have the same speculation

2020-03-11T12:53:19Z

problems as 64-bit models. For the syscall instruction issue, add nop;nop after swi 0, in preparation for jumping over a speculation barrier here later. ok kettenis

Mark as 'protected' all the routines from the quad/ and softfloat/ subdirs,

2019-11-10T22:23:28Z

as well as those in arch/arm/gen/divsi3.S. This cleans up the PLTs on the 32bit archs. luna88k testing by aoyama@ "looks good" kettenis@, testing and ok deraadt@

Stop exporting the internal _mcount symbol as that's only referenced

2019-10-26T18:47:10Z

by the ASM stub, which is also in libc. The compiler only generates invocations of the latter. ok mpi@ deraadt@ kettenis@

Save and restore the relevant FPU state on armv7.

2018-06-22T15:18:50Z

ok deraadt@

Clear the sign bit in the QNAN constants used by strtof, strtod and strtold,

2018-05-28T03:20:25Z

so passing "nan" and "-nan" produces a NaN with the right sign. Bug reported and diff provided by George Koehler. ok kettenis@

Drop memory barrier in _atomic_lock() implementation since the callers now

2018-05-17T20:28:32Z

take care of this. ok visa@, mpi@

Change floating-point mode/environment control functions to operate on

2018-02-28T11:16:54Z

both the hardfloat (FPU registers) and softfloat (software) state. This makes these functions work correctly when mixing hardfloat and softfloat code. Disable trapping for softfloat since most (if not all) ARMv7 and ARMv8 hardware that is on the market doesn't support trapping of floating-point exceptions. ok patrick@

Implement ffs(3) using the CLZ instructions which has been available ever

2018-01-21T21:56:02Z

since ARMv5. Should be much faster but more importantly it removes the data table from .text which could introduce unwanted ROP gadgets. Based on changes in Android/Bionic by Elliott Hughes. ok patrick@

Partial revert of rev. 1.7, fixes build with clang

2018-01-19T11:10:43Z

The error was: --8<-- ffs.S:57:2: error: unsupported relocation on symbol adrne r2, .L_ffs_table ^ -->8-- Minimal workaround suggested by deraadt@, ok guenther@ kettenis@