<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-openbsd/lib/libcompiler_rt/Makefile, branch jd/queueboosts</title>
<subtitle>WireGuard implementation for the OpenBSD kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-openbsd/atom/lib/libcompiler_rt/Makefile?h=jd%2Fqueueboosts</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-openbsd/atom/lib/libcompiler_rt/Makefile?h=jd%2Fqueueboosts'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/'/>
<updated>2020-04-04T22:11:36Z</updated>
<entry>
<title>Implement __atomic_is_lock_free for powerpc.  Needed because the</title>
<updated>2020-04-04T22:11:36Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-04-04T22:11:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=004e15d6a27248383965a270534db07a47fde1ae'/>
<id>urn:sha1:004e15d6a27248383965a270534db07a47fde1ae</id>
<content type='text'>
architecture doesn't implement 64-bit atomic operations.  This
implementation is pessimistic and only flags naturally aligned
operations up to and including 32-bit as lock free.

tested by cwen@
ok gkoehler@
</content>
</entry>
<entry>
<title>Use the same additional arch specific files for sparc64 as is done for mips</title>
<updated>2018-12-25T09:20:49Z</updated>
<author>
<name>claudio</name>
<email>claudio@openbsd.org</email>
</author>
<published>2018-12-25T09:20:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=e37d018de997f24864e475a305434b79e3e2b38b'/>
<id>urn:sha1:e37d018de997f24864e475a305434b79e3e2b38b</id>
<content type='text'>
or aarch64. Needed to build userland with clang.
OK visa@ kettenis@
</content>
</entry>
<entry>
<title>Add quad-precision floating-point support routines for mips64.</title>
<updated>2018-10-21T05:13:49Z</updated>
<author>
<name>visa</name>
<email>visa@openbsd.org</email>
</author>
<published>2018-10-21T05:13:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=e0fb7a9cc24d8d3744a2055b87717f2bb8e0d238'/>
<id>urn:sha1:e0fb7a9cc24d8d3744a2055b87717f2bb8e0d238</id>
<content type='text'>
OK kettenis@
</content>
</entry>
<entry>
<title>On armv7, remove symbols that are also present in our libc.  Because of the</title>
<updated>2018-01-16T23:04:42Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2018-01-16T23:04:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=7448b33d2f632aeb82fb0db488c7848468c2061e'/>
<id>urn:sha1:7448b33d2f632aeb82fb0db488c7848468c2061e</id>
<content type='text'>
EABI aliases these can lead to duplicate symbol errors, especially when
mixing code compiled with gcc and clang.  The intention is to revert this
once we convert armv7 to hardfloat.

ok patrick@, guenther@
</content>
</entry>
<entry>
<title>Update to compiler-rt 5.0.1.</title>
<updated>2017-12-26T20:59:44Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2017-12-26T20:59:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=c72a1c0960669bfd1eb87723f902bc05ee727707'/>
<id>urn:sha1:c72a1c0960669bfd1eb87723f902bc05ee727707</id>
<content type='text'>
ok kettenis@
</content>
</entry>
<entry>
<title>In compiler-rt, a few assembler implementations for i386 floating point</title>
<updated>2017-09-08T19:04:00Z</updated>
<author>
<name>naddy</name>
<email>naddy@openbsd.org</email>
</author>
<published>2017-09-08T19:04:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=81c9d1cab52ead7d467511330c500b2cc3789b76'/>
<id>urn:sha1:81c9d1cab52ead7d467511330c500b2cc3789b76</id>
<content type='text'>
conversion functions use SSE2 instructions, but these are not guarded by
#ifdef __SSE2__, and there is no implementation using general purpose
registers.  For these functions, use the generic C variants instead,
otherwise they will cause SIGILL on older processors.

From FreeBSD; ok deraadt@ mlarkin@ patrick@
</content>
</entry>
<entry>
<title>Enable atomic support functions.</title>
<updated>2017-08-04T12:00:59Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2017-08-04T12:00:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=54eab0a9e59f15d7246ae0fddd3993b458c8888f'/>
<id>urn:sha1:54eab0a9e59f15d7246ae0fddd3993b458c8888f</id>
<content type='text'>
ok mlarkin@
</content>
</entry>
<entry>
<title>Enable TLS support but default to the emulatated TLS model.  Enable the</title>
<updated>2017-05-09T21:09:27Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2017-05-09T21:09:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=247444e3e456e299c607fd19dda8d130f3637bcf'/>
<id>urn:sha1:247444e3e456e299c607fd19dda8d130f3637bcf</id>
<content type='text'>
runtime support code libcompiler_rt for this.  This code uses functions that
live in libpthread, so code that uses TLS support will need to be linked
with -lpthread.  This should allow more ports to build with base clang.

ok espie@
</content>
</entry>
<entry>
<title>Change build infrastructure to allow building both gcc and clang.  This</title>
<updated>2017-04-17T15:53:21Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2017-04-17T15:53:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=d8ee3b1570afd0531506bb87c4850b4e2c9b9d20'/>
<id>urn:sha1:d8ee3b1570afd0531506bb87c4850b4e2c9b9d20</id>
<content type='text'>
doesn't actually flip the switch yet, so aarch64 continues to be the only
architecture for which we build clang.

ok jsg@, deraadt@
</content>
</entry>
<entry>
<title>Add a few missing quad-precision support functions on arm64 and reorder the</title>
<updated>2017-04-09T21:47:05Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2017-04-09T21:47:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=80d4d76cb8ee07036e83665a9a3fb3d4e21f695e'/>
<id>urn:sha1:80d4d76cb8ee07036e83665a9a3fb3d4e21f695e</id>
<content type='text'>
list to match what's in CMakeLists.txt.

ok sthen@
</content>
</entry>
</feed>
