<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-openbsd/lib/libcompiler_rt, branch jd/queueboosts</title>
<subtitle>WireGuard implementation for the OpenBSD kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-openbsd/atom/lib/libcompiler_rt?h=jd%2Fqueueboosts</id>
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<updated>2020-04-04T22:11:36Z</updated>
<entry>
<title>Implement __atomic_is_lock_free for powerpc.  Needed because the</title>
<updated>2020-04-04T22:11:36Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-04-04T22:11:36Z</published>
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<id>urn:sha1:004e15d6a27248383965a270534db07a47fde1ae</id>
<content type='text'>
architecture doesn't implement 64-bit atomic operations.  This
implementation is pessimistic and only flags naturally aligned
operations up to and including 32-bit as lock free.

tested by cwen@
ok gkoehler@
</content>
</entry>
<entry>
<title>Update compiler-rt to 8.0.1.  This is mostly a cosmetic update for us.</title>
<updated>2019-09-29T17:53:57Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2019-09-29T17:53:57Z</published>
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<id>urn:sha1:220151357c8ea1d11791300a3ebd505967bb5615</id>
<content type='text'>
Tested in snaps
ok kettenis@
</content>
</entry>
<entry>
<title>Make compiler-rt's __clear_cache() work on 32-bit ARM by making</title>
<updated>2019-09-28T13:19:19Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2019-09-28T13:19:19Z</published>
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<id>urn:sha1:46dc7675d379b942787d1ea50b1017273002af8a</id>
<content type='text'>
it use sysarch().

From Josh Elsasser
ok kettenis@
</content>
</entry>
<entry>
<title>Update compiler-rt to 7.0.1.  This is mostly a cosmetic update since</title>
<updated>2019-01-29T22:35:43Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2019-01-29T22:35:43Z</published>
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<id>urn:sha1:64bb0428c690670660f6397e66ca194e512556ae</id>
<content type='text'>
most changes are guarded behind WIN32 or GCC ifdefs.  The functional
change is in emutls and AMD model checking.

ok kettenis@
</content>
</entry>
<entry>
<title>Use the same additional arch specific files for sparc64 as is done for mips</title>
<updated>2018-12-25T09:20:49Z</updated>
<author>
<name>claudio</name>
<email>claudio@openbsd.org</email>
</author>
<published>2018-12-25T09:20:49Z</published>
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<id>urn:sha1:e37d018de997f24864e475a305434b79e3e2b38b</id>
<content type='text'>
or aarch64. Needed to build userland with clang.
OK visa@ kettenis@
</content>
</entry>
<entry>
<title>Add quad-precision floating-point support routines for mips64.</title>
<updated>2018-10-21T05:13:49Z</updated>
<author>
<name>visa</name>
<email>visa@openbsd.org</email>
</author>
<published>2018-10-21T05:13:49Z</published>
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<id>urn:sha1:e0fb7a9cc24d8d3744a2055b87717f2bb8e0d238</id>
<content type='text'>
OK kettenis@
</content>
</entry>
<entry>
<title>Update to compiler-rt 6.0.0.</title>
<updated>2018-09-18T20:21:40Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2018-09-18T20:21:40Z</published>
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<id>urn:sha1:3d56ebce3ebb9c8a172fe01306f9897260997ec2</id>
<content type='text'>
tested by naddy@
ok kettenis@
</content>
</entry>
<entry>
<title>On armv7, remove symbols that are also present in our libc.  Because of the</title>
<updated>2018-01-16T23:04:42Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2018-01-16T23:04:42Z</published>
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<id>urn:sha1:7448b33d2f632aeb82fb0db488c7848468c2061e</id>
<content type='text'>
EABI aliases these can lead to duplicate symbol errors, especially when
mixing code compiled with gcc and clang.  The intention is to revert this
once we convert armv7 to hardfloat.

ok patrick@, guenther@
</content>
</entry>
<entry>
<title>Update to compiler-rt 5.0.1.</title>
<updated>2017-12-26T20:59:44Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2017-12-26T20:59:44Z</published>
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<id>urn:sha1:c72a1c0960669bfd1eb87723f902bc05ee727707</id>
<content type='text'>
ok kettenis@
</content>
</entry>
<entry>
<title>In compiler-rt, a few assembler implementations for i386 floating point</title>
<updated>2017-09-08T19:04:00Z</updated>
<author>
<name>naddy</name>
<email>naddy@openbsd.org</email>
</author>
<published>2017-09-08T19:04:00Z</published>
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<id>urn:sha1:81c9d1cab52ead7d467511330c500b2cc3789b76</id>
<content type='text'>
conversion functions use SSE2 instructions, but these are not guarded by
#ifdef __SSE2__, and there is no implementation using general purpose
registers.  For these functions, use the generic C variants instead,
otherwise they will cause SIGILL on older processors.

From FreeBSD; ok deraadt@ mlarkin@ patrick@
</content>
</entry>
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