wireguard-openbsd/lib/libunwind/src/UnwindRegistersSave.S, branch jd/simplify-queueingWireGuard implementation for the OpenBSD kernelhttps://git.zx2c4.com/wireguard-openbsd/atom/lib/libunwind/src/UnwindRegistersSave.S?h=jd%2Fsimplify-queueing2020-04-04T14:06:21ZFix powerpc libunwind for cpus without altivec.2020-04-04T14:06:21Zgkoehlergkoehler@openbsd.org2020-04-04T14:06:21Zurn:sha1:233ed438328db8c587872d7af24be341498239b9
Defer saving the altivec registers until we need to access them (like
how arm defers saving the VFP registers). This prevents a SIGILL on a
G3 cpu when code throws a C++ exception.
ok kettenis@
Merge libc++, libc++abi and libunwind version 8.0.0.2019-06-17T22:28:47Zpatrickpatrick@openbsd.org2019-06-17T22:28:47Zurn:sha1:308ed93135e1e5919c16767bd98e8835e42e613b
Ports build by naddy@
Tested by visa on octeon
Tested by kettenis on macppc and sparc64
Convert powerpc assembly code into something clangs internal assembler2019-02-08T16:38:38Zketteniskettenis@openbsd.org2019-02-08T16:38:38Zurn:sha1:156f54c7e05d8430db02d08250d850a42f5d0521
understands.
ok mpi@, visa@
Merge libc++, libc++abi and libunwind version 7.0.1.2019-02-04T17:04:33Zpatrickpatrick@openbsd.org2019-02-04T17:04:33Zurn:sha1:71d9f34297ef5b8104aac6236e8dc7c95ff5da15
Tested by visa on octeon
Tested by kettenis on arm64, armv7 and sparc64
"go for it" deraadt and sthen
Backport libunwind hardware floating point handling for mips64.2018-10-21T05:08:35Zvisavisa@openbsd.org2018-10-21T05:08:35Zurn:sha1:def71959deb2deb81d76c49c6917229abc5ea77b
Upstream reference:
https://reviews.llvm.org/D41968
OK kettenis@
merge libunwind 6.0.0; ok patrick@, kettenis@2018-09-11T18:03:05Zrobertrobert@openbsd.org2018-09-11T18:03:05Zurn:sha1:18617da6761020511f4541a4e88d2854c3e1eb34Add sparc64 support.2017-04-18T15:35:24Zketteniskettenis@openbsd.org2017-04-18T15:35:24Zurn:sha1:60f9c91b81c4e318101a49794c0f84f0961bd10aImport libunwind 3.9.02016-09-03T18:42:12Zpatrickpatrick@openbsd.org2016-09-03T18:42:12Zurn:sha1:03737b27a3148494cc74492e8010677dde089697