wireguard-openbsd/lib/libunwind, branch jd/queueboostsWireGuard implementation for the OpenBSD kernelhttps://git.zx2c4.com/wireguard-openbsd/atom/lib/libunwind?h=jd%2Fqueueboosts2020-04-04T23:46:30ZMake libcxxabi provide __register_frame, _Unwind_Backtrace and friends2020-04-04T23:46:30Zjcajca@openbsd.org2020-04-04T23:46:30Zurn:sha1:a412a45212c6539000c62bda6daad7c2c6b4a4a4
on sparc64
Discrepancy spotted in
http://build-failures.rhaalovely.net/sparc64/2020-04-03/devel/llvm,,-main.log
Input from gkoehler@, ok kettenis@ deraadt@
Fix powerpc libunwind for cpus without altivec.2020-04-04T14:06:21Zgkoehlergkoehler@openbsd.org2020-04-04T14:06:21Zurn:sha1:233ed438328db8c587872d7af24be341498239b9
Defer saving the altivec registers until we need to access them (like
how arm defers saving the VFP registers). This prevents a SIGILL on a
G3 cpu when code throws a C++ exception.
ok kettenis@
Merge libc++, libc++abi and libunwind version 8.0.0.2019-06-17T22:28:47Zpatrickpatrick@openbsd.org2019-06-17T22:28:47Zurn:sha1:308ed93135e1e5919c16767bd98e8835e42e613b
Ports build by naddy@
Tested by visa on octeon
Tested by kettenis on macppc and sparc64
Import libunwind 8.0.0.2019-06-17T22:20:15Zpatrickpatrick@openbsd.org2019-06-17T22:20:15Zurn:sha1:ebca5146cc059db9955fe4a1f2f1001ae96dd16dInitial IP-based caching implementation with O(logn) lookup.2019-03-13T08:44:32Zpiroftipirofti@openbsd.org2019-03-13T08:44:32Zurn:sha1:003688bd4aad94c6ca348a09289c56eb30eb1c34
Caching implemented via red-black trees, this can be improved and
further work is on-going to bring it closer to GNU's performance that
uses a LRU-MRU 8-entries based caching algorithm.
Prompted by robert@ who run into a runtime of an executed macro of
5 minutes in libreoffice. With this the execution is reduced to 58 seconds.
C++11 tips from espie@, rsadowski@
Tested by robert@
OK mortimer@, kettenis@.
Convert powerpc assembly code into something clangs internal assembler2019-02-08T16:38:38Zketteniskettenis@openbsd.org2019-02-08T16:38:38Zurn:sha1:156f54c7e05d8430db02d08250d850a42f5d0521
understands.
ok mpi@, visa@
Merge libc++, libc++abi and libunwind version 7.0.1.2019-02-04T17:04:33Zpatrickpatrick@openbsd.org2019-02-04T17:04:33Zurn:sha1:71d9f34297ef5b8104aac6236e8dc7c95ff5da15
Tested by visa on octeon
Tested by kettenis on arm64, armv7 and sparc64
"go for it" deraadt and sthen
Import libunwind 7.0.12019-02-04T16:54:30Zpatrickpatrick@openbsd.org2019-02-04T16:54:30Zurn:sha1:7eed64eca19d93cd26421fb274e8122f37fa801cTurns out I botched the previous commit. While making the %o7 + 8 bit2019-02-03T15:24:17Zketteniskettenis@openbsd.org2019-02-03T15:24:17Zurn:sha1:904ff9a2689ab293783b1642bea8f3b81bc01042
consistent across the various low-level interfaces that handle the
instruction pointer, reality turns out to be a bit more subtle.
On SPARC, DWARF2 uses r15 (which maps to %o7) as the return address column.
This means that we should not add/subtract 8 when it reads/updates the
register state while processing DWARF2 instructions. That in turn means
that getIP() and setIP() should not have been changed in my previous commit.
ok visa@
On SPARC, the return address is %o7 + 8.2019-02-03T12:30:02Zketteniskettenis@openbsd.org2019-02-03T12:30:02Zurn:sha1:2f358089abd9682739333c7761ac427883f1e2ae
ok guenther@, deraadt@, patrick@, dlg@, visa@