wireguard-openbsd/sys/arch/alpha/pci, branch jd/queueboosts WireGuard implementation for the OpenBSD kernel https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/alpha/pci?h=jd%2Fqueueboosts 2017-10-20T12:05:01Z Make sure the logic deciding whether to use BWX operations in cia(4) 2017-10-20T12:05:01Z mpi mpi@openbsd.org 2017-10-20T12:05:01Z urn:sha1:5e60df7973454ae65fed77835b767796566ec456 operation uses the CPU capabilities, rather than a not-yet-initialized variable which will eventually be set to the CPU capabilities. from miod@ If you use sys/param.h, you don't need sys/types.h 2017-09-08T05:36:51Z deraadt deraadt@openbsd.org 2017-09-08T05:36:51Z urn:sha1:b27348b2082c02cb5227e0e4933400ad6739ec5a Initial support for MSI-X. Only supported on amd64 for now. I have diffs to 2016-05-04T14:30:00Z kettenis kettenis@openbsd.org 2016-05-04T14:30:00Z urn:sha1:058ea91224d14a3d3097d3da93630f63bfdeece5 actually use this in em(4) and xhci(4), but I'm not committing those yet because we almost certainly need to save and restore the MSI-X registers during suspend/resume. However, this allows mpi@ to play with multiple-vector support in networking hardware. Requested by mpi@ ok mlarkin@, mikeb@ dev/isa/isavar.h does not appear to be needed by any of consumers. 2016-01-12T17:20:02Z deraadt deraadt@openbsd.org 2016-01-12T17:20:02Z urn:sha1:9ec0cef05bdb5960d1ac1567364ee32be508b8a9 (noticed because of another issue: one consumer is a high level busdriver, but also contains i2c support, so the isa #define for ia_irq clashes against i2c) Use NULL instead of 0 for pci_decompose_tag() pointer arguments. 2015-10-30T07:51:49Z miod miod@openbsd.org 2015-10-30T07:51:49Z urn:sha1:adde9fa4f018e22c3ee4c231c2278e864bf218ec If the SRM has explicitely set up some ISA interrupts level-triggered, 2015-08-15T20:06:21Z miod miod@openbsd.org 2015-08-15T20:06:21Z urn:sha1:f7fb432e3ea1f16e2c56f7ecba0cbcef90782099 honour this setting and consider them level-triggered instead of `polarity decided by the first driver to use it'. Add explicit code to turn registration of edge-triggered interrupts 3 and 4 into level-triggered, if they were set up a level-triggered by the SRM. Based upon a NetBSD diff which eventually got reverted in NetBSD. However, it turns out this is necessary for the kernel to correctly run with serial console on my Multia. Store the {e,}isa_chipset_t in the softc, rather than on sio_bridge_callback()'s 2015-08-15T19:26:00Z miod miod@openbsd.org 2015-08-15T19:26:00Z urn:sha1:0087ab59ef1e89071e9a9eec005da7dbd21e57e3 stack, for {e,}isa drivers might have a need for them way after autoconf - at least pcic@isa does. No need to cargo-cult include <alpha/pci/sioreg.h> here. 2015-08-15T19:18:27Z miod miod@openbsd.org 2015-08-15T19:18:27Z urn:sha1:804f5aff0aa4fe42a2ebd94c958fddfba0895093 Fix isa_chipset_t ic_intr_{alloc,check} prototype: these take an 2015-08-15T19:15:18Z miod miod@openbsd.org 2015-08-15T19:15:18Z urn:sha1:578428abcd795c5a9d6fcbe1107a7c62e6f3cad5 isa_chipset_tag_t, not an isa_chipset_tag_t *, as isa_chipset_tag_t is already a pointer. Make sure pci_intr_map() will perform proper interrupt swizzling for devices 2015-07-26T05:09:44Z miod miod@openbsd.org 2015-07-26T05:09:44Z urn:sha1:4a80d888544524498f87912d21ea9f9edaff8548 behind a bridge, if the SRM didn't pick an interrupt line for them.