wireguard-openbsd/sys/arch/amd64/include/bus.h, branch jd/queueboosts WireGuard implementation for the OpenBSD kernel https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/amd64/include/bus.h?h=jd%2Fqueueboosts 2017-06-04T06:21:37Z Re-arrange struct bus_dmamap members 2017-06-04T06:21:37Z sf sf@openbsd.org 2017-06-04T06:21:37Z urn:sha1:eeb83a6b7b7cd6ae6e6b0e5576e872b32fb55180 This reduces holes/padding and makes the struct smaller by 8 bytes. ok kettenis@ add a BUS_DMA_64BIT flag to bus_dma on all our archs. 2017-05-08T00:27:45Z dlg dlg@openbsd.org 2017-05-08T00:27:45Z urn:sha1:b0002153e68e19a4277a3f21e84cea855054f754 this is so drivers can advertise that they can handle 64 dma addresses to the platform. it may choose to handle dmamaps differently based on this flag. tweaks and ok tom@ ok kettenis@ Add bus_dmamem_alloc_range(9) to allow drivers to allocate DMA'able memory 2015-01-24T15:13:55Z kettenis kettenis@openbsd.org 2015-01-24T15:13:55Z urn:sha1:3df3eb3b8b322a2a7f2ce6bbbff3b7296d910867 within a range that is more (or less) restrictive than the default range. ok deraadt@, stsp@ It's been a quarter century: we can assume volatile is present with that name. 2014-03-29T18:09:28Z guenther guenther@openbsd.org 2014-03-29T18:09:28Z urn:sha1:2df76cc2a0aee2cb2166e3799b7bb5c3f883f83d ok dlg@ mpi@ deraadt@ Remove the scatter/gather dma implementation as it is no longer used. 2013-12-12T21:04:50Z kettenis kettenis@openbsd.org 2013-12-12T21:04:50Z urn:sha1:20c16ccc15b8f349c80498bbb4b8b69095bd09de ok krw@, deraadt@ Add an interface to rebind AGP DMA mappings. To be used by the upcoming KMS 2013-03-17T21:49:00Z kettenis kettenis@openbsd.org 2013-03-17T21:49:00Z urn:sha1:7c84e9efdc58581f22e310b26d0fff2e912618e1 support to reload bindings after suspend/resume and to update cachability flags in the address translation table entries. the bus_space api implies that there's a bus endianness that it will 2013-01-29T01:15:57Z dlg dlg@openbsd.org 2013-01-29T01:15:57Z urn:sha1:aacc3e86042c9eadb8b53e48ec91533b9d60ac7b swap for you to the hosts endianness. sometimes you dont want this hand holding and just want raw access to the registers. bus_space does have stuff to do this already, but they deal with buffers which can be awkward if you just want to get or set a single register. this adds the following to i386 and amd64: bus_space_read_raw_2() bus_space_read_raw_4() bus_space_read_raw_8() bus_space_write_raw_2() bus_space_write_raw_4() bus_space_write_raw_8() sparc64 already implements this, even though it wasnt part of the official api. how handy. i'll do other archs as i can. kettenis@ and miod@ seem ok with this twist the amd64 bus_space implementation a bit. instead of using the tag 2013-01-18T01:54:40Z dlg dlg@openbsd.org 2013-01-18T01:54:40Z urn:sha1:93c7b57c1dbd29219f5df90059d8d38fc81eee71 as an identifier for IO or memory mappings that was checked inside the api, turn it into a pointer to a structure of function pointers. the api then generally becomes a set of macros that deref the function pointers on the callers behalf. the idea is that following a pointer to very small functions is cheap compared to doing compares continuously. a notable exception to the macro wrappers is bus_space_barrier which is now a static inline function. the only argument to it that gets used is the flags, and thats usually a constant at compile time so it can be inlined to a single fence instruction. the kernel is smaller and the api is more cache friendly now. ok deraadt@ implement bus_space_foo_8 for amd64. it will panic on attempts to do 8 2013-01-15T09:33:30Z dlg dlg@openbsd.org 2013-01-15T09:33:30Z urn:sha1:9f2791f24723b6fde3c1f9087b2676ed7426dab1 byte operations on I/O space with "invalid I/O operation", but works great for mem mappings. compiled AND tested on myx(4) on amd64. ok deraadt@ kettenis@ miod@ pirofti@ Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently. 2011-03-23T16:54:33Z pirofti pirofti@openbsd.org 2011-03-23T16:54:33Z urn:sha1:2fa72412907ae78c4787a4a8f888c5f0486e225c Discussed and okay drahn@. Okay deraadt@.