wireguard-openbsd/sys/arch/arm/include/cpu.h, branch jd/queueboosts

introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.

2020-05-31T06:23:56Z

rnd.c uses nanotime to get access to some bits that change quickly between events that it can mix into the entropy pool. it doesn't use nanotime to get a monotonically increasing set or ordered and accurate timestamps, it just wants something with bits that change. there's been discussions for years about letting rnd use a clock that's super fast to read, but not necessarily accurate, but it wasn't until recently that i figured out it wasn't interested in time at all, so things like keeping a fast clock coherent between cpu cores or correct according to ntp is unecessary. this means we can just let rnd read the cycle counters on cpus and things will be fine. cpus with cycle counters that vary in their speed and arent kept consistent between cores may even be desirable in this context. so this is the first step in converting rnd.c to reading cycle counter. it copies the nanotime backend to each arch, and they can replace it with something MD as a second step later on. djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits. thanks to visa for his eyes. ok deraadt@ visa@ deraadt@ says he will help handle any MD fallout that occurs.

Add machdep.compatible.

2020-05-17T15:36:50Z

ok jsg@

Implement cpu_kick() and cpu_unidle().

2020-01-12T16:55:00Z

Add code to spin up secondary CPUs.

2019-10-27T10:26:12Z

ok jsg@

Synch the cpu match/attach/identify code with arm64. This drops some

2019-09-30T21:48:32Z

information from dmesg that is no longer relevant to ARMv7 CPUs in favour of printing the full architected cache hierarchy in the same way as we do on arm64. It also is another small step towards SMP support on armv7. ok patrick@

Implement DVFS support.

2019-09-23T18:10:43Z

ok patrick@

Include srp.h where struct cpu_info uses srp to avoid erroring out when

2018-12-05T10:28:21Z

including cpu.h machine/intr.h etc without first including param.h when MULTIPROCESSOR is defined. ok visa@

Make it possible to build a MULTIPROCESSOR kernel on armv7. While this

2018-08-06T18:39:13Z

doesn't actually spin up any secondary CPUs, it does run. Mostly a cleanup of along the lines of what I did earlier on arm64. Makes armv7 use the MI mplock implementation and implements copyin32. ok patrick@

Remove strange /* End of file */ style.

2018-06-30T15:23:35Z

Add kernel support for the VFP FPU/SIMD unit. Based on a diff by drahn@.

2018-01-26T16:22:19Z

This allows us to use floating-pointer and vector instructions in userland code. The current implementation assumes all 32 VFP registers are present. This should be the case on all armv7 hardware currently supported by OpenBSD. ok patrick@