wireguard-openbsd/sys/arch/arm/include, branch jd/queueboosts WireGuard implementation for the OpenBSD kernel https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/arm/include?h=jd%2Fqueueboosts 2020-05-31T06:23:56Z introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c. 2020-05-31T06:23:56Z dlg dlg@openbsd.org 2020-05-31T06:23:56Z urn:sha1:01802d2cc63d886227ab3b39e923ff13cf516166 rnd.c uses nanotime to get access to some bits that change quickly between events that it can mix into the entropy pool. it doesn't use nanotime to get a monotonically increasing set or ordered and accurate timestamps, it just wants something with bits that change. there's been discussions for years about letting rnd use a clock that's super fast to read, but not necessarily accurate, but it wasn't until recently that i figured out it wasn't interested in time at all, so things like keeping a fast clock coherent between cpu cores or correct according to ntp is unecessary. this means we can just let rnd read the cycle counters on cpus and things will be fine. cpus with cycle counters that vary in their speed and arent kept consistent between cores may even be desirable in this context. so this is the first step in converting rnd.c to reading cycle counter. it copies the nanotime backend to each arch, and they can replace it with something MD as a second step later on. djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits. thanks to visa for his eyes. ok deraadt@ visa@ deraadt@ says he will help handle any MD fallout that occurs. Add machdep.compatible. 2020-05-17T15:36:50Z kettenis kettenis@openbsd.org 2020-05-17T15:36:50Z urn:sha1:c5c0009c6b631723b5fb95feae57638eaf156035 ok jsg@ Let the armv7 bus_dma layer and simplebus(4) implementation deal with 2020-04-29T15:25:07Z kettenis kettenis@openbsd.org 2020-04-29T15:25:07Z urn:sha1:37084e1e34e6eafe959b14d27c905d6c5ddf0888 DMA remapping in the same way as arm64. This relies on the dma-ranges property in the device tree and allows us to get rid of the hack for the Raspberry Pi in the dwctwo(4) driver. Note that this does not include the hack in simplebus(4) that we have on arm64 since firmware that has the dma-ranges is in widespread use now. ok patrick@ Implement cpu_kick() and cpu_unidle(). 2020-01-12T16:55:00Z kettenis kettenis@openbsd.org 2020-01-12T16:55:00Z urn:sha1:056a2ca64e92b2e792c6ef8deb8255cee5ff099b Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest of 2019-12-19T17:53:27Z mpi mpi@openbsd.org 2019-12-19T17:53:27Z urn:sha1:20b8e21a6ed450b3757a6f438fd47483feb5bfe0 the kernel. ok patrick@ Remove get_pc_str_offset(), which has been unused since we switched 2019-11-07T21:54:49Z patrick patrick@openbsd.org 2019-11-07T21:54:49Z urn:sha1:fdf77656d36f9b7b81b91b3200ebf153cd1a0460 to clang, where the stack frame format changed significantly. Prompted by guenther@ noticing deprecated ASM warnings ok drahn@ Convert db_addr_t -> vaddr_t but leave the typedef for now. 2019-11-07T14:44:52Z mpi mpi@openbsd.org 2019-11-07T14:44:52Z urn:sha1:6d6b8a876ccc0691e0769b505db074d6e7d968ef Add code to spin up secondary CPUs. 2019-10-27T10:26:12Z kettenis kettenis@openbsd.org 2019-10-27T10:26:12Z urn:sha1:4e7e04ca925b10f704b4398d5900b06e3f194bba ok jsg@ Synch the cpu match/attach/identify code with arm64. This drops some 2019-09-30T21:48:32Z kettenis kettenis@openbsd.org 2019-09-30T21:48:32Z urn:sha1:6a1ae6a6f2650c25cd442f350f6dc0fc16c4e5be information from dmesg that is no longer relevant to ARMv7 CPUs in favour of printing the full architected cache hierarchy in the same way as we do on arm64. It also is another small step towards SMP support on armv7. ok patrick@ Implement DVFS support. 2019-09-23T18:10:43Z kettenis kettenis@openbsd.org 2019-09-23T18:10:43Z urn:sha1:3d29854d4b138f482ccdf6aa653e7f3f8371b152 ok patrick@