wireguard-openbsd/sys/arch/arm64/include/pcb.h, branch jd/queueboosts WireGuard implementation for the OpenBSD kernel https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/arm64/include/pcb.h?h=jd%2Fqueueboosts 2018-07-04T17:52:29Z ptrace debug support for arm64. 2018-07-04T17:52:29Z drahn drahn@openbsd.org 2018-07-04T17:52:29Z urn:sha1:c7d5b2ab1872bf2eefdcf3e1b4abd4af5cdacafa Single step is not yet supported but reading and setting registers are working as expected, breakpoints also are working. ok kettenis@ Simplify ASID allocation code considerably by allocating an ASID up front 2017-03-24T19:48:01Z kettenis kettenis@openbsd.org 2017-03-24T19:48:01Z urn:sha1:b37186f06c8236a9bdcc35c30ce3bc7154a25b04 when a pmap is created and freeing it when the pmap is destroyed. This diff relies on the fill 16-bit ASID space being implemented in the processor. While this is documented as an optional feature in the ARMv8 architecture reference manual, all ARMv8 processors seen in the wild so far implement the full 16-bit space. This change incorporates changes by drahn@ to allocate an empty page table for the lower half of the address space for the kernel. ok drahn@, patrick@ Cleanup TCB header a la OpenBSD/armv7. 2017-01-10T13:13:12Z patrick patrick@openbsd.org 2017-01-10T13:13:12Z urn:sha1:e39d21cd7ca06fa7c3c99adcb5ebd97534743794 Import of OpenBSD/arm64 2016-12-17T23:38:33Z patrick patrick@openbsd.org 2016-12-17T23:38:33Z urn:sha1:f24071e5a82bde237999ed17cfea827c436463e8 This commit contains all the kernel files related to the OpenBSD/arm64 port. It is based on the PowerPC pmap, loongson, arm/armv7 code and FreeBSD aarch64 code. Hard work done by Dale Rahn.