<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-openbsd/sys/arch/armv7/include, branch jd/queueboosts</title>
<subtitle>WireGuard implementation for the OpenBSD kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/armv7/include?h=jd%2Fqueueboosts</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/armv7/include?h=jd%2Fqueueboosts'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/'/>
<updated>2019-09-29T10:36:52Z</updated>
<entry>
<title>Add IPI support.  Taken ftrom arm64.</title>
<updated>2019-09-29T10:36:52Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2019-09-29T10:36:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=ad0d549be989c6f8d4daf91c86007e6a64fb3df1'/>
<id>urn:sha1:ad0d549be989c6f8d4daf91c86007e6a64fb3df1</id>
<content type='text'>
ok patrick@
</content>
</entry>
<entry>
<title>Whitespace removal</title>
<updated>2019-05-06T03:34:43Z</updated>
<author>
<name>mlarkin</name>
<email>mlarkin@openbsd.org</email>
</author>
<published>2019-05-06T03:34:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=4bab9ed15e0505502471229cd32598829add035e'/>
<id>urn:sha1:4bab9ed15e0505502471229cd32598829add035e</id>
<content type='text'>
Pointed out by Jerome Pinot
</content>
</entry>
<entry>
<title>change marks[] array to uint64_t, so the code can track full 64-bit</title>
<updated>2019-04-10T04:17:31Z</updated>
<author>
<name>deraadt</name>
<email>deraadt@openbsd.org</email>
</author>
<published>2019-04-10T04:17:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=2340cfa57962bd12069f312342c641006c968c28'/>
<id>urn:sha1:2340cfa57962bd12069f312342c641006c968c28</id>
<content type='text'>
details from the ELF header instead of faking it.
Proposal from mlarkin, tested on most architectures already
</content>
</entry>
<entry>
<title>Remove unused spllock().</title>
<updated>2018-08-20T15:02:07Z</updated>
<author>
<name>visa</name>
<email>visa@openbsd.org</email>
</author>
<published>2018-08-20T15:02:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=864f2f83ec4c08eb41848f403ee4e5dadd8f3951'/>
<id>urn:sha1:864f2f83ec4c08eb41848f403ee4e5dadd8f3951</id>
<content type='text'>
OK deraadt@ mpi@
</content>
</entry>
<entry>
<title>Define __HAVE_ACPI on arm64 and __HAVE_FDT on arm64, armv7 and octeon</title>
<updated>2018-08-09T12:19:32Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2018-08-09T12:19:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=5483bc5650782f036096ae5803d9853d9761ecd0'/>
<id>urn:sha1:5483bc5650782f036096ae5803d9853d9761ecd0</id>
<content type='text'>
so that we can include firmware-dependant code in generic drivers to be
able to extract metadata information like MAC addresses and out-of-band
interrupts from the ACPI/FDT tables.

ok kettenis@
</content>
</entry>
<entry>
<title>Extend the FDT interrupt API to support masking and unmasking IRQs.</title>
<updated>2018-08-08T11:06:33Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2018-08-08T11:06:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=575c38b7a70a591e79a8ae61d42299b9f9eb5121'/>
<id>urn:sha1:575c38b7a70a591e79a8ae61d42299b9f9eb5121</id>
<content type='text'>
Discussed with kettenis@
</content>
</entry>
<entry>
<title>Make it possible to build a MULTIPROCESSOR kernel on armv7.  While this</title>
<updated>2018-08-06T18:39:13Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2018-08-06T18:39:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=abff443dbd09597733c7ba1d0b7f9bd0cdd45306'/>
<id>urn:sha1:abff443dbd09597733c7ba1d0b7f9bd0cdd45306</id>
<content type='text'>
doesn't actually spin up any secondary CPUs, it does run.  Mostly a cleanup
of &lt;machine/cpu.h&gt; along the lines of what I did earlier on arm64.  Makes
armv7 use the MI mplock implementation and implements copyin32.

ok patrick@
</content>
</entry>
<entry>
<title>Add PCI machdep headers based on the arm64 port.</title>
<updated>2018-07-09T09:53:06Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2018-07-09T09:53:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=b00e6b026bc77ea8796079e032118357e041dc68'/>
<id>urn:sha1:b00e6b026bc77ea8796079e032118357e041dc68</id>
<content type='text'>
ok kettenis@
</content>
</entry>
<entry>
<title>Implement an API for establishing legacy PCI interrupts.  This specific</title>
<updated>2018-07-06T13:08:10Z</updated>
<author>
<name>patrick</name>
<email>patrick@openbsd.org</email>
</author>
<published>2018-07-06T13:08:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=5e5d77c4a0993271c5c6e1fdec12a0ed668e4af5'/>
<id>urn:sha1:5e5d77c4a0993271c5c6e1fdec12a0ed668e4af5</id>
<content type='text'>
establish function parses the device tree's interrupt map to discover
the correct interrupt controller node and interrupt cells for the given
PCI node.  After retrieving that information we can do the same the
normal FDT establish API already does.

MSI interrupts are established in a different way as well.  Instead of
simply hooking up the interrupt handler and returning an MD cookie, we
need to pass back information for the PCI controller to configure its
interrupt correctly.  For this, add another establish routine into the
FDT-based interrupt API which looks up msi-controller nodes and calls
their MSI-specific establish function if requested.

ok kettenis@
</content>
</entry>
<entry>
<title>Define IPL_MPFLOOR on SP archs.</title>
<updated>2018-05-30T13:54:09Z</updated>
<author>
<name>mpi</name>
<email>mpi@openbsd.org</email>
</author>
<published>2018-05-30T13:54:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-openbsd/commit/?id=bfde8bbe3fdd57920de738f183d1f7c967377f62'/>
<id>urn:sha1:bfde8bbe3fdd57920de738f183d1f7c967377f62</id>
<content type='text'>
From Mathieu &lt;naabed at poolp.org&gt;, ok visa@
</content>
</entry>
</feed>
