wireguard-openbsd/sys/arch/mips64/include/mips_cpu.h, branch jd/queueboosts

Add a driver for the OCTEON cryptographic unit. It provides

2018-04-09T13:46:15Z

a hardware-accelerated implementation of several encryption and authentication algorithms for ipsec(4): AES-CBC AES-CTR AES-GCM AES-GMAC HMAC-MD5 HMAC-SHA1 HMAC-SHA2-256 HMAC-SHA2-384 HMAC-SHA2-512 Please note that the driver is currently disabled. OK deraadt@

Use macros for Config1 bits.

2017-08-26T13:53:46Z

Fix TLB size computation on OCTEON II and III. The CPUs have utilized

2017-06-11T03:35:30Z

the whole TLB space even before this. However, TLB initialization on boot and TLB flush on ASID wraparound have been incomplete. These have caused crashes of processes.

Make TCB address available to userspace via the UserLocal register.

2017-04-20T15:42:26Z

This lets programs get the address without a system call on OCTEON II and later. Add UserLocal load emulation for systems that do not implement the RDHWR instruction or the UserLocal register. OK guenther@

Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUs

2016-08-14T08:23:52Z

that support the Execute-Inhibit exception. This makes user space W^X effective on Octeon Plus and later Octeon versions. Feedback from miod@, thanks! No objection from deraadt@

Add PageGrain bits.

2016-08-06T09:32:04Z

It is no longer necessary to include CR_BERR in CR_INT_MASK if CPU_R8000.

2015-09-24T18:38:58Z

Split ever-growing mips into what 99% of the kernel needs,

2012-10-03T11:18:20Z

which will remain in , and a new mips_cpu.h containing only the goriest md details, which are only of interest to a handful set of files; this is similar in spirit to what alpha does, but here does not include the new file.