wireguard-openbsd/sys/arch/mips64/include/proc.h, branch jd/queueboostsWireGuard implementation for the OpenBSD kernelhttps://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/mips64/include/proc.h?h=jd%2Fqueueboosts2017-04-13T03:52:25ZProvide mips64 with kernel-facing TCB_{GET,SET} macros that store it2017-04-13T03:52:25Zguentherguenther@openbsd.org2017-04-13T03:52:25Zurn:sha1:f5d56f6d1abf3988ecad6e5bcc0d9e60de25e475
in struct mdproc. With that, all archs have those and the __HAVE_MD_TCB
macro can be unifdef'ed as always defined.
ok kettenis@ visa@ jsing@
Remove RM7000/RM9000-specific performance counter code. It originates2016-08-16T13:03:58Zvisavisa@openbsd.org2016-08-16T13:03:58Zurn:sha1:592093c100b7b5c68ad55cc5f1402db114d6d7f0
from PMON2000 and has not been enabled on OpenBSD.
Suggested by and ok miod@ (after seeing a quad_t cleanup patch of mine)
Rename mips64's trap_frame into trapframe.2016-03-06T19:42:27Zmpimpi@openbsd.org2016-03-06T19:42:27Zurn:sha1:b43ebd1336ec45c4f58736636aa17c117ac3cbe6
For coherency with other archs and in order to use it in MI code.
ok visa@, tobiasu@
Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.2011-03-23T16:54:33Zpiroftipirofti@openbsd.org2011-03-23T16:54:33Zurn:sha1:2fa72412907ae78c4787a4a8f888c5f0486e225c
Discussed and okay drahn@. Okay deraadt@.
Floating-point emulation code for systems lacking proper FPU (i.e. Octeon),2010-11-24T21:16:26Zmiodmiod@openbsd.org2010-11-24T21:16:26Zurn:sha1:0f3849f4bd70ec6a5f51ba6460e5bc487f013762
enabled by option FPUEMUL.
This is pretty straightforward, except for conditional branch on FPU condition
codes emulation (bc1f/bc1fl/bc1t/bc1tl instructions): unlike most
RISC-with-delay-slots designs (m88k, sparc), the branch pipeline is not exposed
to the kernel on Mips, therefore we can not resume a branch without losing the
delay slot instruction.
Some other operating systems work around this issue by emulating the delay
slot instruction, but this is error-prone (and requires the kernel code to
be aware of all supported instructions of the processor it is currently running
on), some use dedicated breakpoints to single-step through the delay slot and
then resume the branch as expected, but this causes a lot of copy-on-write
allocations.
This code chooses a third path, of copying the delay slot instructions to run toa special `magic' page, followed by a special trap instruction to give control
back to the kernel. This makes sure the instruction will actually be run by the
processor, and that no more than one page per process is wasted, regardless of
the number of branches to emulate.
Tested on octeon (big-endian) by syuu@ and on loongson (little-endian) by me.
Note that enabling option FPUEMUL in the kernel will completely disable the
hardware FPU, if there is one; there is currently no way to build a kernel
supporting both hardware and software FPU, and there is no reason to change
this until there is a strong need to support both.
Make sure ptrace_sstep(,0) actually clears breakpoints, by replacing the2010-11-24T21:01:02Zmiodmiod@openbsd.org2010-11-24T21:01:02Zurn:sha1:4f4e8df457f3a0e24c866156bcbee9cd88c75d77
ptrace guts with a logic similar to what the alpha port does.
If UPAGES would turn out to be 1, instead of using wired TLB entries to map2009-12-07T19:01:03Zmiodmiod@openbsd.org2009-12-07T19:01:03Zurn:sha1:71f315848919d80627ce137056e1feb533e784c3
the u area after each context switch, simply convert it to an XKPHYS address,
so that access to it never faults. Idea from NetBSD.
Remove code allowing native binaries with O32 ABI to run, there aren't any...2009-11-19T20:13:51Zmiodmiod@openbsd.org2009-11-19T20:13:51Zurn:sha1:724f56535ffda757c6945fa839a821693cf1fc7aSwitch sgi to per-process AST, and move ast() from interrupt.c to trap.c2009-06-10T18:05:30Zmiodmiod@openbsd.org2009-06-10T18:05:30Zurn:sha1:a2bf86990e8482e1dababd05dc5afa1abad2443f
where it can use userret() instead of duplicating it.
Remove advertising clause from UCB licenses; ok deraad@2005-08-07T07:29:44Zmiodmiod@openbsd.org2005-08-07T07:29:44Zurn:sha1:53aa784a41578b06c923d9b3a5590acbd3bd0b73