wireguard-openbsd/sys/arch/mips64/include, branch jd/queueboostsWireGuard implementation for the OpenBSD kernelhttps://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/mips64/include?h=jd%2Fqueueboosts2020-05-31T06:23:56Zintroduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.2020-05-31T06:23:56Zdlgdlg@openbsd.org2020-05-31T06:23:56Zurn:sha1:01802d2cc63d886227ab3b39e923ff13cf516166
rnd.c uses nanotime to get access to some bits that change quickly
between events that it can mix into the entropy pool. it doesn't
use nanotime to get a monotonically increasing set or ordered and
accurate timestamps, it just wants something with bits that change.
there's been discussions for years about letting rnd use a clock
that's super fast to read, but not necessarily accurate, but it
wasn't until recently that i figured out it wasn't interested in
time at all, so things like keeping a fast clock coherent between
cpu cores or correct according to ntp is unecessary. this means we
can just let rnd read the cycle counters on cpus and things will
be fine. cpus with cycle counters that vary in their speed and
arent kept consistent between cores may even be desirable in this
context.
so this is the first step in converting rnd.c to reading cycle
counter. it copies the nanotime backend to each arch, and they can
replace it with something MD as a second step later on.
djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits.
thanks to visa for his eyes.
ok deraadt@ visa@
deraadt@ says he will help handle any MD fallout that occurs.
Retire <machine/varargs.h>.2020-05-27T15:16:04Zvisavisa@openbsd.org2020-05-27T15:16:04Zurn:sha1:9df0f941a91e9f67cc4e63514cb174cb2a5783fd
Nothing uses the header anymore.
OK deraadt@ mpi@
Convert db_addr_t -> vaddr_t but leave the typedef for now.2019-11-07T14:44:52Zmpimpi@openbsd.org2019-11-07T14:44:52Zurn:sha1:6d6b8a876ccc0691e0769b505db074d6e7d968efSubstitute boolean_t/TRUE/FALSE by int/1/0.2019-11-07T11:04:21Zmpimpi@openbsd.org2019-11-07T11:04:21Zurn:sha1:60291ffe1b3f7f81a5037b612608bd0d0de4c942
ok dlg@, jasper@
Fix atomic_sub_long_nv() on mips64. The negation should use2019-10-28T09:41:37Zvisavisa@openbsd.org2019-10-28T09:41:37Zurn:sha1:97b484412220002069a7e7e6fb5ff87d981a3556
64-bit unsigned arithmetic.
in non-MP, cpu_number() the #define should be 0UL; ok visa2019-09-02T02:35:08Zderaadtderaadt@openbsd.org2019-09-02T02:35:08Zurn:sha1:282d9ab5bb8194ee733174e9c1921d57001c3eefFix a race in invalidation of remote TLB entries.2019-08-21T16:14:34Zvisavisa@openbsd.org2019-08-21T16:14:34Zurn:sha1:b96ff64e96e7b9c5ddaecee7d5a85ffb3f43236d
If a CPU updates a pmap concurrently with the activation of that pmap
on another CPU, invalidation of TLB entries might be incomplete.
It is also possible that a CPU altogether stops updating its TLB.
Prevent the race by synchronizing pmap activations and logic that
determines where to send TLB invalidation IPIs.
To avoid mutex wait without ability to process IPIs, the context switch
code is adjusted to call pmap_activate() with interrupts enabled.
In practice, interrupts up to IPL_SCHED are still disabled on context
switch.
Turn need_resched() and signotify() into proper functions on mips64.2019-05-05T13:28:14Zvisavisa@openbsd.org2019-05-05T13:28:14Zurn:sha1:00c79297cde52f3758ac191ea525674a23bbbeadGuard against repeated inclusion of <mips64/pte.h>. This fixes drm build2019-04-26T16:27:36Zvisavisa@openbsd.org2019-04-26T16:27:36Zurn:sha1:68bce21a3d3afabf82b3dd780ea49f9f5e21771f
on loongson.
Work around a limitation of clang integrated assembler on mips64.2019-04-19T09:19:22Zvisavisa@openbsd.org2019-04-19T09:19:22Zurn:sha1:ba36fba2f7dd7c5c34bf6a8358bcb85b5d314e36
The assembler does not handle undeclared local symbols properly
and generates R_MIPS_CALL16 relocations where it should generate
local GOT references. For now, get along with the problem by
declaring local symbols where necessary.
OK kettenis@ guenther@