wireguard-openbsd/sys/arch/powerpc/include/atomic.h, branch jd/queueboosts WireGuard implementation for the OpenBSD kernel https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/powerpc/include/atomic.h?h=jd%2Fqueueboosts 2019-07-11T21:18:05Z Use "i" constrain instead of "n" constrain in inline assembly. Makes clang 2019-07-11T21:18:05Z kettenis kettenis@openbsd.org 2019-07-11T21:18:05Z urn:sha1:d3299c81f3075097f8f803d7f533a455b7832fe8 happy. ok visa@, mpi@ Make atomic.h ready to be included in userland. 2017-05-12T08:47:48Z mpi mpi@openbsd.org 2017-05-12T08:47:48Z urn:sha1:7886579d84ca239a2c2855189cc61e403f9f0360 - keep setbits/clearbits inside _KERNEL ok dlg@, kettenis@ put mpi's atomics back in, but with the return value of add (and therefore sub, inc, and dec) fixed. 2015-05-06T03:30:03Z dlg dlg@openbsd.org 2015-05-06T03:30:03Z urn:sha1:3c99142581a6a3b344bc85a3d07af12953b9c513 the asm read the value from memory into a register, added to it, and then tried to write it back. after succeeding it doesnt have to add again before returning. this splits sub, inc, and dec off from add. sub can use the subf opcode, and inc and dec can use the addic opcode. explicitely identify where the modified memory is so we can avoid using "memory" as a clobber. ok mpi@ Revert back to using GCC builtins. This code triggers an off by one in 2015-04-24T15:26:22Z mpi mpi@openbsd.org 2015-04-24T15:26:22Z urn:sha1:c32ad687d4f9d888e4b84a306286c1c917445103 device_unref() as found by deraadt@. Implement the MI atomic API for PowerPC to avoid using gcc builtins that 2015-04-22T06:39:03Z mpi mpi@openbsd.org 2015-04-22T06:39:03Z urn:sha1:64a1b3614f5a5a739b38ed775790c0f6f7dbfa9b include extra sync operations. ok kettenis@ Implement the membar(9) API for powerpc. 2014-06-19T11:29:21Z kettenis kettenis@openbsd.org 2014-06-19T11:29:21Z urn:sha1:9a9dc99caeb823662f57ab71e8b81c732f164181 ok miod@, dlg@ It's been a quarter century: we can assume volatile is present with that name. 2014-03-29T18:09:28Z guenther guenther@openbsd.org 2014-03-29T18:09:28Z urn:sha1:2df76cc2a0aee2cb2166e3799b7bb5c3f883f83d ok dlg@ mpi@ deraadt@ The atomic_setbits_int() and atomic_clearbits_int() functions touch the 2013-08-06T08:19:52Z kettenis kettenis@openbsd.org 2013-08-06T08:19:52Z urn:sha1:035f2f4eaef1c2f15e618d49dc0fc4cfe009729c condition code register so mark it s clobbered. Fixes uvm_page_physload() and who knows what else. ok jsg@, mpi@ Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently. 2011-03-23T16:54:33Z pirofti pirofti@openbsd.org 2011-03-23T16:54:33Z urn:sha1:2fa72412907ae78c4787a4a8f888c5f0486e225c Discussed and okay drahn@. Okay deraadt@. Implement proper atomic.h for powerpc. With help from art@ and drahn@. 2007-03-17T22:10:04Z kettenis kettenis@openbsd.org 2007-03-17T22:10:04Z urn:sha1:b1e784d09ac71603114d8954462b43f6d0596907 ok drahn@