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<title>wireguard-openbsd/sys/arch/powerpc64/dev, branch jd/queueboosts</title>
<subtitle>WireGuard implementation for the OpenBSD kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/powerpc64/dev?h=jd%2Fqueueboosts</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/powerpc64/dev?h=jd%2Fqueueboosts'/>
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<updated>2020-06-22T21:13:40Z</updated>
<entry>
<title>Add opalcons(4), a driver for the OPAL console.</title>
<updated>2020-06-22T21:13:40Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-22T21:13:40Z</published>
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<id>urn:sha1:9cff15ef82ea860b6c29be0e577000460a15a956</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix calculation of the year.</title>
<updated>2020-06-19T22:20:08Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-19T22:20:08Z</published>
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<id>urn:sha1:ee574247be9df101025bbcbda7aa1865937d2439</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Remove debug code.</title>
<updated>2020-06-14T19:21:43Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-14T19:21:43Z</published>
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<id>urn:sha1:da1a9ca49fe09db9ea27e670763cacb80d35b955</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Provide address space extents. While the firmware does configure the bridge</title>
<updated>2020-06-14T19:00:12Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-14T19:00:12Z</published>
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<id>urn:sha1:c324a513e016cc466ec4e856e1d3d219ab6bd7f2</id>
<content type='text'>
windows it doesn't enable the bus master bit in the command register.
This prevents DMA from working.  By providing the address space extents
ppb(4) will automatically configure the bridge and set the bit.
</content>
</entry>
<entry>
<title>Get context switching between kernel threads going.</title>
<updated>2020-06-14T17:56:54Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-14T17:56:54Z</published>
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<id>urn:sha1:0d8e59b5e319514ff9b1b0067a3e09c205ee8062</id>
<content type='text'>
Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.
</content>
</entry>
<entry>
<title>Add support for the XIVE interrupt controller found on POWER9 CPUs.</title>
<updated>2020-06-13T22:58:42Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-13T22:58:42Z</published>
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<id>urn:sha1:1af8fcf97b3b100709d0e932f7915e9a88dbb517</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Allocate MSIs from the range provided by the device tree and bind them</title>
<updated>2020-06-10T19:02:41Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-10T19:02:41Z</published>
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<id>urn:sha1:fbe807609c61870036576f06144597ab9f41e02b</id>
<content type='text'>
to a PE.
</content>
</entry>
<entry>
<title>A bit of MSI support code; we need to distinguish between 32-bit and 64-bit</title>
<updated>2020-06-10T16:31:27Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-10T16:31:27Z</published>
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<id>urn:sha1:1f76319b3a51492f9c330ef3b49dba56499b046d</id>
<content type='text'>
MSIs on powerpc64.
</content>
</entry>
<entry>
<title>Add opal(4) a driver that interacts with the OPAL frimware and implements</title>
<updated>2020-06-10T15:01:40Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-10T15:01:40Z</published>
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<id>urn:sha1:d59f9b5a372f5d8d93b757ba7e14971c78817f67</id>
<content type='text'>
RTC functionality.
</content>
</entry>
<entry>
<title>Set up 64-bit mmio windows and enable DMA bypass mode.</title>
<updated>2020-06-08T19:06:47Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-06-08T19:06:47Z</published>
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<id>urn:sha1:324b9c791e90d17983baf20a01105361fd951640</id>
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</content>
</entry>
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