wireguard-openbsd/sys/arch/powerpc64/include/cpu.h, branch jd/queueboosts WireGuard implementation for the OpenBSD kernel https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/powerpc64/include/cpu.h?h=jd%2Fqueueboosts 2020-06-22T16:58:20Z Make return-to-user and kernel re-entry work. This adds a per-pmap SLB 2020-06-22T16:58:20Z kettenis kettenis@openbsd.org 2020-06-22T16:58:20Z urn:sha1:37d56e14ef1a0db6f4d11db0ecc4e6ce6dbee7df cache. We might want to turn that in a per-proc cache at some point, but this gets us to the point where we can sucessfully have init(1) do its first system call. Provide working definitions of PROC_STACK() and PROC_PC(). 2020-06-22T13:52:40Z kettenis kettenis@openbsd.org 2020-06-22T13:52:40Z urn:sha1:717af3c7dd8043a8a6063e7ee0c7c5d9a7f79459 Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9). 2020-06-21T13:23:59Z kettenis kettenis@openbsd.org 2020-06-21T13:23:59Z urn:sha1:45dd89a788b71518ee353421475f4387cece6926 Cache kernel SLB entries in per-CPU struct and restore them upon 2020-06-18T21:52:57Z kettenis kettenis@openbsd.org 2020-06-18T21:52:57Z urn:sha1:b079169d670a312c2024b82f6700f43503a4c197 kernel entry. Implement cpu-rnd_messybits() as a read of the cycle counter register. 2020-06-14T20:15:09Z kettenis kettenis@openbsd.org 2020-06-14T20:15:09Z urn:sha1:354e4bfb42df53ffaa90df70fe12739d198d0ba2 Get context switching between kernel threads going. 2020-06-14T17:56:54Z kettenis kettenis@openbsd.org 2020-06-14T17:56:54Z urn:sha1:0d8e59b5e319514ff9b1b0067a3e09c205ee8062 Since the stacks for kernel threads are not mapped 1:1 this involves translating virtual addresses into physical addresses when making OPAL calls. Add support for the XIVE interrupt controller found on POWER9 CPUs. 2020-06-13T22:58:42Z kettenis kettenis@openbsd.org 2020-06-13T22:58:42Z urn:sha1:1af8fcf97b3b100709d0e932f7915e9a88dbb517 Add clock interrupt support, adapted from the randomized dual clock 2020-06-10T19:06:53Z kettenis kettenis@openbsd.org 2020-06-10T19:06:53Z urn:sha1:ff56acc25e8db3a5cb1bd6491e816eb5452e11af implementation from Dale Rahn but relicensed (with his permission) under our standard ISC license. Implement intr_enable(), intr_disable() and intr_restore(). 2020-06-09T18:58:58Z kettenis kettenis@openbsd.org 2020-06-09T18:58:58Z urn:sha1:12e5a6fb87fb863c7e8613c7284ac8869219ba69 Implement pmap_zero_page() and pmap_copy_page(). 2020-06-07T09:59:45Z kettenis kettenis@openbsd.org 2020-06-07T09:59:45Z urn:sha1:502390abdff22dfb2fe4b6fc8f971aa8977eceaa