wireguard-openbsd/sys/arch/powerpc64, branch master

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2021-03-11T11:16:54Z

timecounting: use C99-style initialization for all timecounter structs

2021-02-23T04:44:30Z

The timecounter struct is large and I think it may change in the future. Changing it later will be easier if we use C99-style initialization for all timecounter structs. It also makes reading the code a bit easier. For reasons I cannot explain, switching to C99-style initialization sometimes changes the hash of the resulting object file, even though the resulting struct should be the same. So there is a binary change here, but only sometimes. No behavior should change in either case. I can't compile-test this everywhere but I have been staring at the diff for days now and I'm relatively confident this will not break compilation. Fingers crossed. ok gnezdo@

Add uhidpp(4), a driver for Logitech HID++ devices. Currently limited to

2021-02-04T16:25:38Z

exposing battery sensors for HID++ 2.0 devices. Most of the code is derived from the hid-logitech-hidpp Linux driver. Thanks to Ville Valkonen for testing. ok mglocker@

Again allow COPTS= to come from the environment again, and don't lose the

2021-01-28T17:39:01Z

SMALL_KERNEL specific variations. ok espie jsg

OPAL implements firmware calls that abstract communicating with the BMC over

2021-01-23T12:10:08Z

IPMI. Use these calls to add support for impi(4) on PowerNV systems. ok dlg@

introduce ujoy(4), a restricted subset of uhid(4) for gamecontrollers.

2021-01-23T05:08:33Z

This includes ujoy_hid_is_collection() to work around limitations of hid_is_collection() until this can be combined without fallout. input, testing with 8bitdo controller, and ok brynet@ PS4 controller testing, fix for hid_is_collection, and ok mglocker@

Enable support for floating-point exceptions. We always run in "precise"

2021-01-09T13:14:02Z

mode. On modern processors (POWER8 and later) there is no performance penalty for this as long as exceptions are disabled in the FPSCR (which is the default). This way we don't have to implement an architecture-dependent system call to set the mode, as it can only be done by the kernel. With help from gkoehler@ ok gkoehler@

Fix typo in comment.

2021-01-07T19:02:45Z

Enter power-saving mode on POWER9 (ISA v3)

2020-12-30T06:06:30Z

When opal(4) attaches, look in the device tree for a psscr value. In cpu_idle_cycle(), use this psscr value and the stop instruction to wait for the next interrupt. In mp kernels, cpu_unidle() now sends an interrupt. In "sysctl hw.sensors", the power and temperature sensors from opalsens(4) may show lower values. The cpu may exit stop at the system reset vector after losing user registers. If so, restore some registers. For now, ignore deeper stop states that would lose hypervisor registers. Our mp kernel uses only the first hardware thread of each core. Take the extra threads from the firmware and stop them forever; this may switch the core from SMT4 to single-thread mode and increase performance. partly by kettenis@, ok kettenis@

Use IPL_VM for the pmap pool like we do on amd64.

2020-12-23T17:54:04Z