<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-openbsd/sys/arch/sgi/include/bus.h, branch jd/queueboosts</title>
<subtitle>WireGuard implementation for the OpenBSD kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-openbsd/atom/sys/arch/sgi/include/bus.h?h=jd%2Fqueueboosts</id>
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<updated>2020-04-14T17:35:28Z</updated>
<entry>
<title>Fix some of the more esoteric bus_space functions.  The</title>
<updated>2020-04-14T17:35:28Z</updated>
<author>
<name>kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2020-04-14T17:35:28Z</published>
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<id>urn:sha1:30c4e479f31e146a25569b6eda3b7bfaba926995</id>
<content type='text'>
bus_space_read_region_n, bus_space_write_region_n and
bus_space_set_region_n functions were all broken.

Same fix as arm64; Thanks to patrick@ for noting that mips64 had the same
code.

ok visa@
</content>
</entry>
<entry>
<title>The device_to_pa routine really isn't needed. We always have physical</title>
<updated>2017-05-11T15:47:45Z</updated>
<author>
<name>visa</name>
<email>visa@openbsd.org</email>
</author>
<published>2017-05-11T15:47:45Z</published>
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<id>urn:sha1:e48a128c9d41336820fcba16cc8cdc5530cdf674</id>
<content type='text'>
addresses. While there, pave the way for BUS_DMA_64BIT (not working
yet).

Diff from miod@; OK dlg@
</content>
</entry>
<entry>
<title>add a BUS_DMA_64BIT flag to bus_dma on all our archs.</title>
<updated>2017-05-08T00:27:45Z</updated>
<author>
<name>dlg</name>
<email>dlg@openbsd.org</email>
</author>
<published>2017-05-08T00:27:45Z</published>
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<id>urn:sha1:b0002153e68e19a4277a3f21e84cea855054f754</id>
<content type='text'>
this is so drivers can advertise that they can handle 64 dma addresses
to the platform. it may choose to handle dmamaps differently based
on this flag.

tweaks and ok tom@
ok kettenis@
</content>
</entry>
<entry>
<title>Support BUS_DMA_NOCACHE in bus_dma(9). Memory allocations done with</title>
<updated>2014-03-10T21:32:15Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2014-03-10T21:32:15Z</published>
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<id>urn:sha1:acc42d188fae858bccd1c6c5f0a92664952f7cc4</id>
<content type='text'>
BUS_DMA_NOCACHE (or BUS_DMA_COHERENT if the platform does not have coherent
caches) will use PMAP_NOCACHE when invoking pmap_enter(), to avoid creating
cached mappings, and then evicting them from the cache.
</content>
</entry>
<entry>
<title>No longer allow bus_space_barrier() to be a NULL pointer on a given</title>
<updated>2012-03-15T18:52:55Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2012-03-15T18:52:55Z</published>
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<id>urn:sha1:b15e547f0e79c7d4f23ccd40756384f1562255fc</id>
<content type='text'>
bus_space_tag on sgi, but rather always provide at least a dummy asm("sync")
flavour. Saves a function pointer test at runtime.
</content>
</entry>
<entry>
<title>Implement bus_space_barrier() on sgi; on xbridge, this will also flush</title>
<updated>2010-08-23T16:56:15Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2010-08-23T16:56:15Z</published>
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<id>urn:sha1:b4283f69e23c640f913cfbe51fbdd8c0d38197cf</id>
<content type='text'>
the pci write buffers.
</content>
</entry>
<entry>
<title>Fix bus_space_{read,write}_raw_region_# operation.</title>
<updated>2010-04-04T11:24:27Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2010-04-04T11:24:27Z</published>
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<id>urn:sha1:ef063de97257daf1721669f8944498316891f78b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Pass both the virtual address and the physical address of the memory range</title>
<updated>2009-12-25T21:02:13Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2009-12-25T21:02:13Z</published>
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<id>urn:sha1:165cb00d5aea583fdd80457f57039e7aa9b7cc4c</id>
<content type='text'>
when invoking the cache functions. The physical address is needed when
operating on physically-indexed caches, such as the L2 cache on Loongson
processors.

Preprocessor abuse makes sure that the physical address computation gets
compiled out when running on a kernel compiled for virtually-indexed
caches only, such as the sgi kernel.
</content>
</entry>
<entry>
<title>Get rid of the obsolet BUS_BARRIER_xxx constants for bus_space_barrier(), only</title>
<updated>2009-07-30T21:39:13Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2009-07-30T21:39:13Z</published>
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<id>urn:sha1:7107682f8cd66f3de37a5950811a419ae4fc4202</id>
<content type='text'>
provide and use BUS_SPACE_BARRIER_xxx.
</content>
</entry>
<entry>
<title>Make sure all platforms understand the flags argument of bus_space_map() and</title>
<updated>2009-07-26T18:48:53Z</updated>
<author>
<name>miod</name>
<email>miod@openbsd.org</email>
</author>
<published>2009-07-26T18:48:53Z</published>
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<id>urn:sha1:2ab138fd07f9495743be1d801fa5f60c606ab698</id>
<content type='text'>
bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.
</content>
</entry>
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