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author | 2010-01-09 23:47:41 +0000 | |
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committer | 2010-01-09 23:47:41 +0000 | |
commit | 97b3e761a2b8c4eeb4c145067bef43b6043063d3 (patch) | |
tree | 0dd6e95d522d72d257516cec3963a8dff83c6bbb | |
parent | Make interrupt depth counters per-cpu. (diff) | |
download | wireguard-openbsd-97b3e761a2b8c4eeb4c145067bef43b6043063d3.tar.xz wireguard-openbsd-97b3e761a2b8c4eeb4c145067bef43b6043063d3.zip |
L2 cache line is at least 64 bytes long on r10k, so use 64 byte increments to
flush L2 in Mips10k_SyncCache().
-rw-r--r-- | sys/arch/mips64/mips64/cache_r10k.S | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/sys/arch/mips64/mips64/cache_r10k.S b/sys/arch/mips64/mips64/cache_r10k.S index b09c8dd6be7..d55b3c21434 100644 --- a/sys/arch/mips64/mips64/cache_r10k.S +++ b/sys/arch/mips64/mips64/cache_r10k.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cache_r10k.S,v 1.11 2010/01/09 23:34:29 miod Exp $ */ +/* $OpenBSD: cache_r10k.S,v 1.12 2010/01/09 23:47:41 miod Exp $ */ /* * Copyright (c) 2004 Opsycon AB (www.opsycon.se) @@ -240,13 +240,14 @@ LEAF(Mips10k_SyncCache, 0) /* Do L2 */ LOAD_XKPHYS(t3, CCA_CACHED) - lw ta0, CI_L2SIZE(a0) # XXX Need set size here. + lw ta0, CI_L2SIZE(a0) + PTR_SRL ta0, ta0, 1 # proper set size 10: cache IndexWBInvalidate_S, 0(t3) cache IndexWBInvalidate_S, 1(t3) - PTR_SUBU ta0, 32 # Fixed L2 cache line size. + PTR_SUBU ta0, 64 # Fixed L2 cache line size. bgtz ta0, 10b - PTR_ADDU t3, 32 + PTR_ADDU t3, 64 j ra nop |