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* use ifiq_input and use it's return value to apply backpressure to rxrs.dlg2020-06-224-11/+16
| | | | | | | this is a step toward deprecating softclock based livelock detection. kettenis@ tested fec(4) on armv7 and dwge(4) on arm64 jmatthew@ tested dwxe(4) on armv7 and noted rings shrinking under load.
* Add bcmtmon(4), a driver for the temperature sensor on the Raspberry Pi 4.kettenis2020-06-202-1/+129
| | | | Written by Alastair Poole.
* Fix pasto; configure pin as input if it isn't an output.kettenis2020-06-121-2/+2
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* Add RK3399 audio clocks.patrick2020-06-112-1/+63
| | | | ok kettenis@
* Add escodec(4), a driver for the Everest ES8316 audio codec,patrick2020-06-112-1/+658
| | | | | | | which is used on the Pinebook Pro. Driver written by Jared McNeill at NetBSD ok kettenis@
* Add rkiis(4), a driver for the I2S controller found on the Rockchippatrick2020-06-112-1/+621
| | | | | | | RK3399. Driver written by Jared McNeill at NetBSD ok kettenis@
* Add simpleamp(4), a driver for "simple audio amplifier". Thispatrick2020-06-102-1/+120
| | | | | | | is one of the aux devices for simpleaudio(4). Its only job is to turn the amplifier's regulator and GPIO on/off when needed. ok kettenis@
* Add simpleaudio(4), a driver for "simple audio cards". This ispatrick2020-06-102-1/+601
| | | | | | | | | just a wrapper that connects the I2S controller, the codec and some aux devices, and provides the information needed to set all those devices up to use the same settings. With help from ratchov@ ok kettenis@
* In case the device tree does not provide a list of brightness levels,patrick2020-06-101-18/+21
| | | | | | | | populate a list of 256 levels as fallback. This makes the Pinebook Pro display work with the dtb that's part of Linux 5.7. "Fine with me" Krystian Lewandowski ok kettenis@
* Add cwfg(4), a driver for the CellWise CW201x fuel gauge. This allowspatrick2020-06-102-1/+398
| | | | | | | | | reading the current battery voltage, capacity and remaining minutes on the Pinebook Pro. Integration into the APM framework stays as exercise for the reader. Driver written by Jared McNeill at NetBSD ok kettenis@
* update drm to linux 5.7jsg2020-06-086-307/+176
| | | | | | | | | | adds kernel support for amdgpu: vega20, raven2, renoir, navi10, navi14 inteldrm: icelake, tigerlake Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for helping, patrick@ for helping adapt rockchip drm and many developers for testing.
* DDR mode seems to work fine on the Rockchip RK3399.kettenis2020-05-311-4/+1
| | | | tested by benno@
* dev/rndvar.h no longer has statistical interfaces (removed during variousderaadt2020-05-297-14/+7
| | | | | | conversion steps). it only contains kernel prototypes for 4 interfaces, all of which legitimately belong in sys/systm.h, which are already included by all enqueue_randomness() users.
* Enable scrollback in simplefb(4).fcambus2020-05-281-1/+2
| | | | OK kettenis@
* change wsdisplay attribute type from long to uint32_tjsg2020-05-253-18/+18
| | | | | | | | miod explained it was initially a long as it was thought drivers may need to allocate storage but in practice they don't need more than 32 bits for an attribute. suggested and reviewed by miod@
* rename wsdisplay alloc_attr() to pack_attr()jsg2020-05-252-5/+5
| | | | | | | | Suggested by John Carmack. miod agrees a rename would make sense and explained it was initially thought drivers may need to allocate storage but in practice they don't need more than 32 bits for an attribute. ok mpi@
* Increase chances of getting a successful PCIe link on the i.MX8MM.patrick2020-05-231-3/+2
| | | | | | | | | Hold the reset GPIO for 100ms instead of 20ms, and also directly continue setting up the link instead of waiting for another 20ms. This brings us in line with what Linux is doing and removes the 10% risk of em(4) not showing up on my HummingBoard Pulse. ok kettenis@
* Improve emulation of bridge config space.kettenis2020-05-221-42/+13
| | | | ok patrick@
* Improve resetting PCIe devices by making use of the reset-gpios property,patrick2020-05-221-1/+21
| | | | | | | which is supposed to be PERST. Before issuing PERST, we must disable link training. This makes my PCIe device come up reliably after warm reboots. Promped by, with feedback from and ok kettenis@
* Enable link training just before triggering the actual training.kettenis2020-05-221-2/+2
| | | | Inspired by a proposed fix for Linux mainline.
* Add support for the Marvell Xenon SDHC. This is used on the Armadapatrick2020-05-221-3/+245
| | | | | | | 3700 and 8040 SoCs and allows me to use an SD card as storage on the Turris Mox. It also should make eMMC/SD show up on the MACCHIATObin. ok kettenis@
* Attach mvpinctrl(4) to the Armada 3700's NB as well. As a consequencepatrick2020-05-222-27/+38
| | | | | | | | mvclock(4) cannot attach to the NB's xtal clock anymore. Instead, have mvpinctrl(4) attach the xtal clock. With this we can use the SD card detect pins on the Turris Mox. ok kettenis@
* Always defer attaching the mvneta(4) interfaces. Otherwise thispatrick2020-05-221-36/+11
| | | | | | | leads to unsorted interface lists in ifconfig and the installer, depending on hardware configuration. ok kettenis@
* And add the node to the struct. Sometimes I maybe shouldn't try splitingpatrick2020-05-221-1/+2
| | | | up diffs before committing.
* Actually store the node in the softc. Missed chunk from the previouspatrick2020-05-221-1/+2
| | | | commit.
* Some sdhc(4) on FDT use a card-detect GPIO or have a non-removable flag.patrick2020-05-221-1/+23
| | | | | | If those properties exist, use those to detect a card. ok kettenis@
* Add mvkpcie(4), a driver for the Aardvark PCIe controller found onpatrick2020-05-222-1/+1031
| | | | | | | | | | | the Armada 3700 SoC. So far only MSI is supported, since it was easier to implement. Both MSI and INTx share a single interrupt pin, so there's nothing to gain anyway, apart from legacy device support. With this I can push traffic through a bwfm(4) in my Turris Mox. ok kettenis@
* Open up a 4GB memory bus window for mvneta(4) on the Marvellpatrick2020-05-201-3/+8
| | | | | | | Armada 3700. This makes my second ethernet controller/port work on the Turris Mox. ok kettenis@
* We need to double the clock frequency for DDR modes.kettenis2020-05-191-1/+5
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* Use static inline instead of inline; fixes ramdisk build.kettenis2020-05-191-2/+2
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* Turn power domain on. Makes OpenBSD boot on the odroid c4.kettenis2020-05-181-1/+3
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* Add some comments.kettenis2020-05-181-1/+3
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* Add amlpwrc(4), a driver for the power domain controller found on variouskettenis2020-05-182-1/+181
| | | | Amlogic SoCs.
* Fix typo in comment.kettenis2020-05-171-2/+2
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* Add support for the SM1 variant and (probably) fix support for the CPUkettenis2020-05-171-12/+17
| | | | clock on the G12A variant.
* The dwctwo(4) FDT glue is now identical on armv7 and arm64. Move it tokettenis2020-05-142-1/+146
| | | | | | /dev/fdt. ok patrick@, visa@
* Calculate divisor for i.MX8M composite clocks. So far we have setpatrick2020-04-281-13/+35
| | | | | | | | | | | | fixed values for the divisors, but the imxesdhc(4) nodes for SD Cards usually have an assigned clock rate of 200 MHz instead of 400 MHz. So instead of just clearing the divisor, we should set it according to what is asked. This also allows us to add the clock for the second imxesdhc(4) node to the list, which I have previously skipped, since otherwise the controller would have been clocked too high. ok kettenis@
* Enable all clocks referenced by the imxesdhc(4) device tree node. Usuallypatrick2020-04-281-1/+2
| | | | | | | | | those are already on, since on those machines we mostly boot from SD/MMC and U-Boot prepares them for us. On machines with a WiFi on imxesdhc(4), U-Boot isn't necessarily configured to do so. Enabling the clocks is the right thing to do anyway. ok kettenis@
* Recognize a few more clocks referenced by the i.MX8MM and i.MX8MQpatrick2020-04-281-0/+19
| | | | imxesdhc(4) device tree nodes.
* Add tcpci(4) to support TCPCI-compliant USB Type-C port controllers.patrick2020-04-272-1/+609
| | | | | | | | | | | | | | | | A Type-C controller has multiple tasks. Even though the orientation of the plug doesn't matter for the user, it matters for the hardware. To be able to know how to route the SuperSpeed pins you need to know which way the plug is connected. Also you need to know if you're a sink/source or device/host. To get the first connection, you toggle between the modes until you find a connection. In case you see that a sink is connected, you can turn on USB Vbus to power the sink. This driver explicitly does not implement USB's Type-C state machine, but if we get more and more of these controllers it might be worth doing. Also there's no support for Power Delivery messages yet. "go for it" kettenis@
* While i.MX6Q and i.MX7D's USB controller nodes claim to be compatiblepatrick2020-04-271-2/+3
| | | | | | | | | to i.MX27, they actually need different bits to be set than the i.MX27. The i.MX8MM's node instead rightfully only claims to be compatible to i.MX7D, since it's the same implementation. Thus change imxehci(4) to also match the i.MX7D compatible. ok kettenis@
* Use the device tree properties to setup imxehci(4)'s USB non-corepatrick2020-04-271-11/+24
| | | | | | | instead of hardcoding the values. Tested on a Cubox-i by kettenis@ ok kettenis@
* Enable the power domain and set the assigned clocks on imxehci(4)'s USBpatrick2020-04-271-1/+5
| | | | | | controller and its nop-PHYs. This is needed on the i.MX8MM. ok kettenis@
* The parent of the i.MX8MM and i.MX8MQ USB_CTRL_ROOTs is USB_BUS,patrick2020-04-271-3/+3
| | | | not USB_CORE_REF.
* PCIe register accesses seem to "hang" on the i.MX8MM if its PHY doesn'tpatrick2020-04-271-14/+38
| | | | | | | | come up. This apparently happens when there's no card in the PCIe slot. Thus improve the error handling in all cases where we wait for a link to come up, return and don't proceed any further. ok kettenis@
* Add gpio support to bcmgpio(4) and make gpio(4) attach such that GPIOskettenis2020-04-272-5/+211
| | | | | | that aren't claimed by kernel drivers can be used from userland. ok sthen@
* Free the "ranges" array in the error handling paths.patrick2020-04-271-1/+7
| | | | ok kettenis@
* fix SDHC_DEBUG build, remove procname printf'sians2020-04-271-5/+4
| | | | ok kettenis@
* Add i.MX8MM support to dwpcie(4). This re-uses the existing codepatrick2020-04-261-18/+98
| | | | | | | | for i.MX8MQ support, but adds some PHY initialization via the imxpciephy(4) regmap and needs a few other bit-settings in the IOMUXC GPR for selecting the ref clock. ok kettenis@
* Add imxpciephy(4), a driver for the i.MX7D's PCIe PHY, whichpatrick2020-04-262-1/+85
| | | | | | | is also implemented on the i.MX8MM. So far this driver is a glorified regmap provider, which will be used by dwpcie(4). ok kettenis@
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