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author | 2017-12-26 20:51:24 -0800 | |
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committer | 2018-01-29 10:25:29 -0800 | |
commit | c776fa113da1f0d0cf83418e8937c0a8a4d83d3e (patch) | |
tree | 5aa9172a85e80592e4fb4f05c4bf53444612338f /sysdeps/unix/sysv/linux/riscv/sys | |
parent | Add documentation for __riscv_flush_icache (diff) | |
download | glibc-c776fa113da1f0d0cf83418e8937c0a8a4d83d3e.tar.xz glibc-c776fa113da1f0d0cf83418e8937c0a8a4d83d3e.zip |
RISC-V: ABI Implementation
This patch contains code that needs to directly know about the RISC-V
ABI, which is specified in a work-in-progress psABI document:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
This is meant to contain all the RISC-V code that needs to explicitly
name registers or manage in-memory structure layout. This does not
contain any of the Linux-specific code.
2018-01-29 Palmer Dabbelt <palmer@sifive.com>
* sysdeps/riscv/__longjmp.S: New file.
* sysdeps/riscv/backtrace.c: Likewise.
* sysdeps/riscv/bits/endian.h: Likewise.
* sysdeps/riscv/bits/setjmp.h: Likewise.
* sysdeps/riscv/bits/wordsize.h: Likewise.
* sysdeps/riscv/bsd-_setjmp.c: Likewise.
* sysdeps/riscv/bsd-setjmp.c: Likewise.
* sysdeps/riscv/dl-trampoline.S: Likewise.
* sysdeps/riscv/gccframe.h: Likewise.
* sysdeps/riscv/jmpbuf-offsets.h: Likewise.
* sysdeps/riscv/jmpbuf-unwind.h: Likewise.
* sysdeps/riscv/machine-gmon.h: Likewise.
* sysdeps/riscv/memusage.h: Likewise.
* sysdeps/riscv/setjmp.S: Likewise.
* sysdeps/riscv/sys/asm.h: Likewise.
* sysdeps/riscv/tls-macros.h: Likewise.
Diffstat (limited to 'sysdeps/unix/sysv/linux/riscv/sys')
0 files changed, 0 insertions, 0 deletions