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| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-10-23 22:23:12 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2026-01-05 14:33:04 +0100 |
| commit | 0154078db6abbc8f1adc216e1b20472f0b50aaf8 (patch) | |
| tree | ff72ac7437cb9315261c83d8492fa6ebfa85a582 /scripts/Makefile.thinlto | |
| parent | arm64: dts: renesas: rzt2h-n2h-evk: Add note about SD1 1.8V modes (diff) | |
arm64: dts: renesas: r9a09g057: Add FCPV and VSPD nodes
Add FCPV and VSPD nodes to RZ/V2H(P) SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251023212314.679303-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions