diff options
| author | 2025-11-01 08:54:51 +0530 | |
|---|---|---|
| committer | 2025-11-01 09:03:42 +0530 | |
| commit | 154ebdb77a3890d2aac543539314485a0711d815 (patch) | |
| tree | 1f46b1ba4ab57b005759a6f5034d47e92e9778ca /scripts/Makefile.thinlto | |
| parent | drm/i915/cx0: Change register bit naming for powerdown values (diff) | |
drm/i915/ltphy: Phy lane reset for LT Phy
Define function to bring phy lane out of reset for LT Phy and the
corresponding pre-requisite steps before we follow the steps for
Phy lane reset. Also create a skeleton of LT PHY PLL enable sequence
function in which we can place this function
Bspec: 77449, 74749, 74499, 74495, 68960
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-4-suraj.kandpal@intel.com
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions
