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| author | 2022-10-18 10:31:49 +0800 | |
|---|---|---|
| committer | 2022-11-09 22:01:31 +0000 | |
| commit | 8fbf94fea0b4e187ca9100936c5429f96b8a4e44 (patch) | |
| tree | f9237d215a010061052c5da519c0f38e5e5187ea /scripts/Makefile.thinlto | |
| parent | soc: sifive: ccache: fix missing free_irq() in error path in sifive_ccache_init() (diff) | |
soc: sifive: ccache: fix missing of_node_put() in sifive_ccache_init()
The device_node pointer returned by of_find_matching_node() with
refcount incremented, when finish using it, the refcount need be
decreased.
Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions
