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| author | 2026-07-21 12:25:45 +0200 | |
|---|---|---|
| committer | 2026-07-21 12:25:45 +0200 | |
| commit | e61e6fd4f139f2342a6bc86da602df7456ef87f6 (patch) | |
| tree | 441184eaabbb0e5e87d033ee2ae3c74724598d62 /scripts/Makefile.thinlto | |
| parent | KVM: x86: Only reset TSC Deadline Timer in apic_timer_expired on KVM_RUN (diff) | |
| parent | KVM: riscv: Fix Spectre-v1 in vector register access (diff) | |
Merge tag 'kvm-riscv-fixes-7.2-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv fixes for 7.2, take #1
- Avoid redundant page-table allocations in ioremap pcache topup
- Apply SBI FWFT LOCK flag only on successful set
- Bound SBI PMU counter mask scan to BITS_PER_LONG
- Skip TLB flush when G-stage PTE becomes valid with Svvptc
- Zicbo[m|z|p] block sizes should be always present in ONE_REG
- Inject instruction access fault on unmapped guest fetch
- Serialize virtual interrupt pending state updates using raw spinlock
- Fix Spectre-v1 in vector register access via ONE_REG
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions
