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authorArnd Bergmann <arnd@arndb.de>2026-06-09 09:16:25 +0200
committerArnd Bergmann <arnd@arndb.de>2026-06-09 09:16:26 +0200
commit9c648f3554920721d8878807cd794fe2d7f989e8 (patch)
tree594e78eb41ac9a4b469fd713e44f429fe6377dff /tools/lib/python/kdoc/python_version.py
parentMerge tag 'riscv-soc-fixes-for-v7.1-rc7' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/fixes (diff)
parentARM: rockchip: keep reset control around (diff)
Merge tag 'v7.1-rockchip-arm32fixe' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
A change in 7.1-rc improved the general handling for reset controllers using SRCU, but at the same time broke really early users before work- queues are available. So adapt the SMP bringup to keep the core-resets around, instead of aquiring/releasing them on ever SMP action. * tag 'v7.1-rockchip-arm32fixe' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: keep reset control around Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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