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| author |   Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2026-03-11 09:48:14 +0200 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2026-05-07 12:38:45 +0300 |
| commit | ff5578789084e7ca2be8c2e628f8bfe1327d6e1b (patch) | |
| tree | b9fa6316a7216dcde94209e302869b409ad7b625 /tools/lib/python | |
| parent | drm/bridge: tc358768: Set pre_enable_prev_first for reverse order (diff) | |
drm/bridge: tc358768: Separate indirect register writes
Some registers can only be written indirectly, using DSI_CONFW register.
We don't have many uses for those registers (in fact, only DSI_CONTROL
is currently written), but the code to do those writes inline is a bit
confusing.
Add a new function, tc358768_confw_update_bits() which can be used to
write the bits indirectly. Only DSI_CONTROL is currently supported.
Tested-by: João Paulo Gonçalves <joao.goncalves@toradex.com> # Toradex Verdin AM62
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://patch.msgid.link/20260311-tc358768-v2-3-e75a99131bd5@ideasonboard.com
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions