diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-12-23 16:15:26 +0530 |
|---|---|---|
| committer |   Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-12-30 09:59:08 +0530 |
| commit | 19467b46c219878adfd81b9de3f9cb38a198fbe5 (patch) | |
| tree | 156346bed280dadcbb3005da370a621bf96e9258 /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/i915/vrr: Add VRR DC balance registers (diff) | |
drm/i915/vrr: Add functions to read out vmin/vmax stuff
Calculate delayed vblank start position with the help of added
vmin/vmax stuff for next frame and final computation.
--v2:
- Correct Author details.
--v3:
- Separate register details from this patch.
--v4:
- Add mask macros.
--v5:
- As live prefix params indicate timings for current frame,
read just _live prefix values instead of next frame timings as
done previously.
- Squash Refactor vrr params patch.
--v6:
- Use error code while returning invalid values. (Jani, Nikula)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-5-mitulkumar.ajitkumar.golani@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions