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| author |   Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> | 2025-12-23 16:15:40 +0530 |
|---|---|---|
| committer |   Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-12-30 10:02:21 +0530 |
| commit | 5558192707072d810b2c9792dfa7e4455d163705 (patch) | |
| tree | 7bfacc156bd519ebe746ac5a9a40ca1d540123c8 /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/i915/display: Add function to configure event for dc balance (diff) | |
drm/i915/vrr: Enable DC Balance
Enable DC Balance from vrr compute config and related hw flag.
Also to add pipe restrictions along with this.
--v2:
- Use dc balance check instead of source restriction.
--v3:
- Club pipe restriction check with dc balance enablement. (Ankit)
--v4:
- Separate out Pipe restrictions to patch#7
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-19-mitulkumar.ajitkumar.golani@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions