diff options
| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2015-01-20 14:44:58 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2016-04-27 14:15:12 +1000 |
| commit | 8574de861978d5187da4f2b7dcf127a5795e967f (patch) | |
| tree | 9f187c64068f902730afa795960a7ec72f0e234e /tools/perf/scripts/python/stackcollapse.py | |
| parent | ARM: dts: r8a7790: Add SYSC PM Domains (diff) | |
ARM: dts: r8a7791: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions