laptop-kernel - Linux kernel tree for laptop

Age	Commit message (Expand)	Author	Files	Lines
2025-04-04	Merge tag 'riscv-for-linus-6.15-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux	Linus Torvalds	1	-2/+2
2025-03-18	Merge patch series "RISC-V: clarify what some RISCV_ISA* config options do & redo Zbb toolchain dependency"	Alexandre Ghiti	1	-2/+2
2025-03-18	RISC-V: separate Zbb optimisations requiring and not requiring toolchain support	Conor Dooley	1	-2/+2
2025-03-12	riscv: fix test_and_{set,clear}_bit ordering documentation	Ignacio Encinas	1	-2/+2
2024-12-30	riscv: Always inline bitops	Nathan Chancellor	1	-10/+10
2024-09-19	riscv: Enable bitops instrumentation	Samuel Holland	1	-20/+23
2024-07-10	riscv: Remove unnecessary int cast in variable_fls()	Thorsten Blum	1	-1/+1
2024-03-22	Merge tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux	Linus Torvalds	1	-114/+24
2024-02-09	work around gcc bugs with 'asm goto' with outputs	Linus Torvalds	1	-4/+4
2024-01-24	riscv: Avoid code duplication with generic bitops implementation	Xiao Wang	1	-114/+24
2024-01-17	riscv: Optimize hweight API with Zbb extension	Xiao Wang	1	-1/+3
2023-11-10	Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux	Linus Torvalds	1	-3/+251
2023-11-09	riscv: Optimize bitops with Zbb extension	Xiao Wang	1	-3/+251
2023-10-18	mm: delete checks for xor_unlock_is_negative_byte()	Matthew Wilcox (Oracle)	1	-1/+0
2023-10-18	riscv: implement xor_unlock_is_negative_byte	Matthew Wilcox (Oracle)	1	-0/+13
2022-01-15	include: move find.h from asm_generic to linux	Yury Norov	1	-1/+0
2019-06-17	Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux	Linus Torvalds	1	-5/+0
2019-06-17	riscv: remove unused barrier defines	Rolf Eike Beer	1	-5/+0
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner	1	-9/+1
2017-11-28	RISC-V: __test_and_op_bit_ord should be strongly ordered	Palmer Dabbelt	1	-1/+1
2017-09-26	RISC-V: Atomic and Locking Code	Palmer Dabbelt	1	-0/+218