aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu
AgeCommit message (Expand)AuthorFilesLines
2025-11-19drm/amd: Skip power ungate during suspend for VPEMario Limonciello1-1/+2
2025-11-19drm/amdgpu: Add sriov vf check for VCN per queue reset support.Shikang Fan2-2/+4
2025-11-19drm/amdgpu/ttm: Fix crash when handling MMIO_REMAP in PDE flagsSrinivasan Shanmugam1-1/+1
2025-11-19drm/amdgpu/vm: Check PRT uAPI flag instead of PTE flagTimur Kristóf1-2/+2
2025-11-19drm/amdgpu: Skip emit de meta data on gfx11 with rs64 enabledYifan Zha1-2/+2
2025-11-19drm/amd: Skip power ungate during suspend for VPEMario Limonciello1-1/+2
2025-11-19drm/amdgpu: Switch to use %ptSpAndy Shevchenko1-2/+1
2025-11-18drm/amdgpu: Unregister mce notifierLijo Lazar1-1/+27
2025-11-14drm/amdgpu: Use pci_rebar_get_max_size()Ilpo Järvinen1-3/+5
2025-11-14drm/amdgpu: Remove driver side BAR release before resizeIlpo Järvinen1-7/+1
2025-11-14PCI: Fix restoring BARs on BAR resize rollback pathIlpo Järvinen1-1/+3
2025-11-14drm/amdgpu: Use amdgpu by default on SI dedicated GPUs (v2)Timur Kristóf2-6/+9
2025-11-14drm/amdgpu: Use amdgpu by default on CIK dedicated GPUsTimur Kristóf1-3/+9
2025-11-14drm/amdgpu: Fix the issue of missing ras message on sriov hostYiPeng Chai2-15/+10
2025-11-14drm/amdgpu: Add lock to serialize sriov command executionYiPeng Chai3-5/+15
2025-11-14drm/amdgpu: Synchronize sriov host to add block_mmsch bit fieldYiPeng Chai1-1/+2
2025-11-14drm/amdgpu: use GFP_ATOMIC instead of NOWAIT in the critical pathChristian König1-3/+3
2025-11-14drm/amdgpu: avoid memory allocation in the critical code path v3Christian König3-49/+14
2025-11-14drm/amdgpu: Enable xgmi extended peer links for sriov guestWill Aitken1-2/+2
2025-11-14drm/amdgpu: Update headers for sriov xgmi ext peer link support feature flagWill Aitken2-1/+6
2025-11-14drm/amdgpu: Refactor sriov xgmi topology filling to common codeWill Aitken2-32/+14
2025-11-14drm/amdgpu: Use amdgpu by default on CIK dedicated GPUsTimur Kristóf1-1/+5
2025-11-14drm/amdgpu: Refactor how SI and CIK support is determinedTimur Kristóf1-65/+86
2025-11-14drm/amdgpu: Avoid xgmi register accessLijo Lazar1-0/+6
2025-11-11drm/amdgpu/jpeg: Add parse_cs for JPEG5_0_1Sathishkumar S1-0/+1
2025-11-11drm/amd/amdgpu: Ensure isp_kernel_buffer_alloc() creates a new BOSultan Alsawaf1-0/+2
2025-11-11drm/amdgpu: fix lock warning in amdgpu_userq_fence_driver_processJesse.Zhang1-2/+3
2025-11-11drm/amdgpu: jump to the correct label on failurePierre-Eric Pelloux-Prayer1-1/+1
2025-11-11drm/amdgpu: disable peer-to-peer access for DCC-enabled GC12 VRAM surfacesVitaly Prosyak1-0/+12
2025-11-11drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000Timur Kristóf1-0/+8
2025-11-11drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUsTimur Kristóf1-11/+3
2025-11-11drm/amdgpu/vce1: Ensure VCPU BO is in lower 32-bit address space (v3)Timur Kristóf4-0/+75
2025-11-11drm/amdgpu: Check if AID is active before accessLijo Lazar1-0/+4
2025-11-11drm/amdgpu/vce1: Implement VCE1 IP block (v2)Timur Kristóf4-1/+818
2025-11-11drm/amdgpu/vce1: Load VCE1 firmwareTimur Kristóf1-0/+12
2025-11-11drm/amdgpu/vce1: Clean up register definitionsTimur Kristóf1-40/+0
2025-11-11drm/amdgpu/vce: Clear VCPU BO, don't unmap/unreserve (v4)Timur Kristóf1-20/+3
2025-11-11drm/amdgpu/vce: Move firmware load to amdgpu_vce_early_initTimur Kristóf5-46/+91
2025-11-11drm/amdgpu/ttm: Use GART helper to map VRAM pages (v2)Timur Kristóf1-10/+2
2025-11-11drm/amdgpu: Use DC by default on SI dGPUsTimur Kristóf1-13/+2
2025-11-11drm/amdgpu/gart: Add helper to bind VRAM pages (v2)Timur Kristóf2-0/+39
2025-11-11drm/amdgpu/gmc6: Place gart at low address rangeTimur Kristóf1-1/+1
2025-11-11drm/amdgpu/userqueue: Remove duplicate amdgpu_reset.h headerJiapeng Chong1-1/+0
2025-11-11drm/amdgpu: resume MES scheduling after user queue hang detection and recoveryJesse.Zhang1-0/+7
2025-11-11drm/amdgpu/jpeg: Add parse_cs for JPEG5_0_1Sathishkumar S1-0/+1
2025-11-11drm/amd/amdgpu: Ensure isp_kernel_buffer_alloc() creates a new BOSultan Alsawaf1-0/+2
2025-11-11drm/amdgpu: optimize timeout implemention in ras_eeprom_update_record_numTao Zhou1-5/+13
2025-11-11drm/amdgpu: add RAS bad page threshold handling for PMFW manages eepromTao Zhou1-6/+30
2025-11-11drm/amdgpu: fix lock warning in amdgpu_userq_fence_driver_processJesse.Zhang1-2/+3
2025-11-11drm/amdgpu: try for more times if RAS bad page number is not updatedTao Zhou1-1/+21
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.