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| author |   Chen Yu <yu.c.chen@intel.com> | 2021-04-28 12:18:12 +0800 |
|---|---|---|
| committer |   Len Brown <len.brown@intel.com> | 2021-05-04 19:10:32 -0400 |
| commit | aeb01e6d71ffaf3011ac755c3083cc200ed57cb4 (patch) | |
| tree | 3eb224e43d6b6bf4dc8a23de29e91d3ee8c9d1a8 /.gitignore | |
| parent | tools/power turbostat: Enable tsc_tweak for Elkhart Lake and Jasper Lake (diff) | |
| download | linux-dev-aeb01e6d71ffaf3011ac755c3083cc200ed57cb4.tar.xz linux-dev-aeb01e6d71ffaf3011ac755c3083cc200ed57cb4.zip | |
tools/power turbostat: Print the C-state Pre-wake settings
C-state pre-wake setting[1] is an optimization for some Intel CPUs to
be woken up from deep C-states in order to reduce latency. According to
the spec, the BIT30 is the C-state Pre-wake Disable. Expose this setting
accordingly.
Sample output from turbostat:
...
cpu51: MSR_IA32_POWER_CTL: 0x1a00a40059 (C1E auto-promotion: DISabled)
C-state Pre-wake: ENabled
cpu51: MSR_TURBO_RATIO_LIMIT: 0x2021212121212224
...
[1] https://intel.github.io/wult/#c-state-pre-wake
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions