diff options
| author |   Sung Joon Kim <sungkim@amd.com> | 2022-06-07 11:36:29 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-06-21 18:17:23 -0400 |
| commit | 06f2f7772dc7ff2e3734e654cb2d0b588076860d (patch) | |
| tree | cac43e240ceb19e09002d9abc70ed9961bff014a | |
| parent | drm/amd/display: add mst port output bw check (diff) | |
| download | linux-dev-06f2f7772dc7ff2e3734e654cb2d0b588076860d.tar.xz linux-dev-06f2f7772dc7ff2e3734e654cb2d0b588076860d.zip | |
drm/amd/display: Fix eDP not light up on resume
[why]
Only on VG, if external display is disconnected during S3 suspend, the
internal panel doesn't light up on resume because we set the power state
using an unsupported DPCD register SET_POWER. To check the register is
supported, we need to check SET_POWER_CAPABLE first which is
eDP-specific DPCD register field.
[how]
Check the SET_POWER_CAPABLE register field and decide the control of the
eDP power state based on the read register value.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Agustin Gutierrez <Agustin.Gutierrez@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 1 |
3 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index fac27b45230f..82b74ee5f0c3 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -1104,9 +1104,13 @@ static bool detect_link_and_local_sink(struct dc_link *link, dc_ctx->dce_version == DCN_VERSION_3_01 && link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_0022B9 && memcmp(&link->dpcd_caps.branch_dev_name, DP_SINK_BRANCH_DEV_NAME_7580, - sizeof(link->dpcd_caps.branch_dev_name)) == 0) + sizeof(link->dpcd_caps.branch_dev_name)) == 0) { dc->config.edp_no_power_sequencing = true; + if (!link->dpcd_caps.set_power_state_capable_edp) + link->wa_flags.dp_keep_receiver_powered = true; + } + sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C_OVER_AUX; sink_caps.signal = SIGNAL_TYPE_EDP; break; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index f9c10d044da6..fd95bd51988b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c @@ -5832,6 +5832,7 @@ void detect_edp_sink_caps(struct dc_link *link) uint32_t link_rate_in_khz; enum dc_link_rate link_rate = LINK_RATE_UNKNOWN; uint8_t backlight_adj_cap; + uint8_t general_edp_cap; retrieve_link_cap(link); link->dpcd_caps.edp_supported_link_rates_count = 0; @@ -5870,6 +5871,12 @@ void detect_edp_sink_caps(struct dc_link *link) link->dpcd_caps.dynamic_backlight_capable_edp = (backlight_adj_cap & DP_EDP_DYNAMIC_BACKLIGHT_CAP) ? true:false; + core_link_read_dpcd(link, DP_EDP_GENERAL_CAP_1, + &general_edp_cap, sizeof(general_edp_cap)); + + link->dpcd_caps.set_power_state_capable_edp = + (general_edp_cap & DP_EDP_SET_POWER_CAP) ? true:false; + dc_link_set_default_brightness_aux(link); core_link_read_dpcd(link, DP_EDP_DPCD_REV, diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index ba57e03d3d9e..51f5d75bf9e3 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -1245,6 +1245,7 @@ struct dpcd_caps { bool panel_mode_edp; bool dpcd_display_control_capable; bool ext_receiver_cap_field_present; + bool set_power_state_capable_edp; bool dynamic_backlight_capable_edp; union dpcd_fec_capability fec_cap; struct dpcd_dsc_capabilities dsc_caps; |