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authorMoudy Ho <moudy.ho@mediatek.com>2022-06-10 14:34:22 +0800
committerMatthias Brugger <matthias.bgg@gmail.com>2022-06-17 15:52:56 +0200
commit0be021f900d332d2610900fb22e0408023bbd078 (patch)
treeccb285413f63b25d1c899e4f5557969a4cd63e3b
parentarm64: dts: mediatek: mt7622-bananapi-bpi-r64: align led node names with dtschema (diff)
arm64: dts: mt8183: add GCE client property for Mediatek MUTEX
In order to allow modules with latency requirements such as MDP3 to set registers through CMDQ, add the relevant dts property. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://lore.kernel.org/r/20220610063424.7800-6-moudy.ho@mediatek.com [mb: fix commit subject] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8183.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 475ec6cfd293..e92a0b8c1ee2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1810,6 +1810,7 @@
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
mediatek,gce-events = <CMDQ_EVENT_MUTEX_STREAM_DONE0>,
<CMDQ_EVENT_MUTEX_STREAM_DONE1>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>;
};
larb0: larb@14017000 {