diff options
| author |   Aida Mynzhasova <aida.mynzhasova@skitlab.ru> | 2013-08-23 04:48:42 -0600 |
|---|---|---|
| committer |   Paul Walmsley <paul@pwsan.com> | 2013-08-23 04:48:42 -0600 |
| commit | 0f0dd08932d4eb0fb336e6c2a48f27855b99ead2 (patch) | |
| tree | b37e44792800a7fee4c6e9e4a75a0d543d4fe378 | |
| parent | ARM: OMAP4: clock: Lock PLLs in the right sequence (diff) | |
| download | linux-dev-0f0dd08932d4eb0fb336e6c2a48f27855b99ead2.tar.xz linux-dev-0f0dd08932d4eb0fb336e6c2a48f27855b99ead2.zip | |
ARM: OMAP: TI81XX: add always-on powerdomain for TI81XX
This patch adds alwon powerdomain support for TI81XX, which is required
for stable functioning of a big number of TI81XX subsystems.
Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
| -rw-r--r-- | arch/arm/mach-omap2/powerdomains3xxx_data.c | 8 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 1 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index e2d4bd804523..328c1037cb60 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -336,6 +336,13 @@ static struct powerdomain dpll5_pwrdm = { .voltdm = { .name = "core" }, }; +static struct powerdomain alwon_81xx_pwrdm = { + .name = "alwon_pwrdm", + .prcm_offs = TI81XX_PRM_ALWON_MOD, + .pwrsts = PWRSTS_OFF_ON, + .voltdm = { .name = "core" }, +}; + static struct powerdomain device_81xx_pwrdm = { .name = "device_pwrdm", .prcm_offs = TI81XX_PRM_DEVICE_MOD, @@ -442,6 +449,7 @@ static struct powerdomain *powerdomains_am35x[] __initdata = { }; static struct powerdomain *powerdomains_ti81xx[] __initdata = { + &alwon_81xx_pwrdm, &device_81xx_pwrdm, &active_816x_pwrdm, &default_816x_pwrdm, diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index ff1ac4a82a04..0e841fd9498a 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -58,6 +58,7 @@ #define TI816X_PRM_IVAHD1_MOD 0x0d00 #define TI816X_PRM_IVAHD2_MOD 0x0e00 #define TI816X_PRM_SGX_MOD 0x0f00 +#define TI81XX_PRM_ALWON_MOD 0x1800 /* 24XX register bits shared between CM & PRM registers */ |