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| author |   Andre Przywara <andre.przywara@arm.com> | 2020-02-28 13:51:03 +0000 |
|---|---|---|
| committer |   Arnd Bergmann <arnd@arndb.de> | 2020-03-26 10:52:19 +0100 |
| commit | 0f1321172e0cab2c8ce85656ab6f531feb540715 (patch) | |
| tree | 99e749098896ea56d87671d6b40f0489c17fd634 | |
| parent | arm: dts: calxeda: Basic DT file fixes (diff) | |
| download | linux-dev-0f1321172e0cab2c8ce85656ab6f531feb540715.tar.xz linux-dev-0f1321172e0cab2c8ce85656ab6f531feb540715.zip | |
arm: dts: calxeda: Provide UART clock
The PL011 UART binding requires two clocks to be named in a node.
Add the second clock, which is the bus gate, that just gets enabled.
Since this is a fixed clock anyway, it doesn't make any difference.
Link: https://lore.kernel.org/r/20200228135106.220620-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/boot/dts/ecx-common.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi index 66ee1d34f72b..f819e3328a9e 100644 --- a/arch/arm/boot/dts/ecx-common.dtsi +++ b/arch/arm/boot/dts/ecx-common.dtsi @@ -114,8 +114,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0xfff36000 0x1000>; interrupts = <0 20 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; + clocks = <&pclk>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; smic@fff3a000 { |