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| author |   Or Gerlitz <ogerlitz@mellanox.com> | 2015-02-03 17:57:17 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2015-02-04 16:17:45 -0800 |
| commit | 0fab541ac2ca9bc69522e488a9dda825e2d4a243 (patch) | |
| tree | 4337ce88d65b0294e099984bf6749256ad37d3bb | |
| parent | net/mlx4: mlx4_config_dev_retrieval() - Initialize struct config_dev before using (diff) | |
| download | linux-dev-0fab541ac2ca9bc69522e488a9dda825e2d4a243.tar.xz linux-dev-0fab541ac2ca9bc69522e488a9dda825e2d4a243.zip | |
net/mlx4_core: Fix misleading debug print on CQE stride support
We do support cache line sizes of 32 and 64 bytes without activating the
CQE stride feature. Fix a misleading print saying that these cache line
sizes aren't supported.
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Amir Vadai <amirv@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/main.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c index f3245fe0f442..7e487223489a 100644 --- a/drivers/net/ethernet/mellanox/mlx4/main.c +++ b/drivers/net/ethernet/mellanox/mlx4/main.c @@ -251,7 +251,8 @@ static void mlx4_enable_cqe_eqe_stride(struct mlx4_dev *dev) if (mlx4_is_master(dev)) dev_cap->function_caps |= MLX4_FUNC_CAP_EQE_CQE_STRIDE; } else { - mlx4_dbg(dev, "Disabling CQE stride cacheLine unsupported\n"); + if (cache_line_size() != 32 && cache_line_size() != 64) + mlx4_dbg(dev, "Disabling CQE stride, cacheLine size unsupported\n"); dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_CQE_STRIDE; dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_EQE_STRIDE; } |