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author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-06-14 10:40:59 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-06-14 13:06:23 +0100 |
commit | 1288786b18f7d979f1f9bcb0134ee5fbfcc8e3d1 (patch) | |
tree | 87b4260c1a98ade5b1c9cb720afd8a5d5191d9d7 | |
parent | drm/i915/opregion: move acpi notifier to dev_priv (diff) | |
download | linux-dev-1288786b18f7d979f1f9bcb0134ee5fbfcc8e3d1.tar.xz linux-dev-1288786b18f7d979f1f9bcb0134ee5fbfcc8e3d1.zip |
drm/i915: Move GEM sanitize from resume_early to resume
This should be a no-op in terms of our control flow, we move the
sanitization (GPU reset) from the bottom of the early resume phase to
the top of the next. However, following hibernation debug, the power
code skips the early resume phase, but as we are about to completely
restore the GTT mappings, we first need to stop the GPU using them i.e.
perform a GPU reset (i915_gem_sanitize()).
Testcase: igt/gem_exec_suspend/basic-S4-devices
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180614094103.18025-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 4cdd70de5ed0..a9c8c66bb525 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1698,6 +1698,8 @@ static int i915_drm_resume(struct drm_device *dev) disable_rpm_wakeref_asserts(dev_priv); intel_sanitize_gt_powersave(dev_priv); + i915_gem_sanitize(dev_priv); + ret = i915_ggtt_enable_hw(dev_priv); if (ret) DRM_ERROR("failed to re-enable GGTT\n"); @@ -1839,8 +1841,6 @@ static int i915_drm_resume_early(struct drm_device *dev) else intel_display_set_init_power(dev_priv, true); - i915_gem_sanitize(dev_priv); - enable_rpm_wakeref_asserts(dev_priv); out: |