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authorEric Huang <JinHuiEric.Huang@amd.com>2016-04-15 15:02:54 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-04 20:29:52 -0400
commit1551019523a01f477888835b9ed363d3a2e73d7b (patch)
tree9fe18d674b1737d7f377e04a635681281bed5e87
parentdrm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2) (diff)
drm/amd/powerplay: revise caching the soft pptable and add it's size
This fixes a bug in the pptable access interface that could lead to a crash. Check the pointer before using it. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c13
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/hwmgr.h1
2 files changed, 9 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
index 96a27876a704..10e3630ee39d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
@@ -138,12 +138,15 @@ const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
u16 size;
u8 frev, crev;
- void *table_address;
+ void *table_address = (void *)hwmgr->soft_pp_table;
- table_address = (ATOM_Tonga_POWERPLAYTABLE *)
- cgs_atom_get_data_table(hwmgr->device, index, &size, &frev, &crev);
-
- hwmgr->soft_pp_table = table_address; /*Cache the result in RAM.*/
+ if (!table_address) {
+ table_address = (ATOM_Tonga_POWERPLAYTABLE *)
+ cgs_atom_get_data_table(hwmgr->device,
+ index, &size, &frev, &crev);
+ hwmgr->soft_pp_table = table_address; /*Cache the result in RAM.*/
+ hwmgr->soft_pp_table_size = size;
+ }
return table_address;
}
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index b1a9ae509ed8..c96e5b1baae0 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -577,6 +577,7 @@ struct pp_hwmgr {
void *device;
struct pp_smumgr *smumgr;
const void *soft_pp_table;
+ uint32_t soft_pp_table_size;
bool need_pp_table_upload;
enum amd_dpm_forced_level dpm_level;
bool block_hw_access;