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| author |   Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> | 2021-02-22 14:17:32 +0530 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2021-04-07 16:59:23 +0100 |
| commit | 1c4422f22605ec0f4455400c52a31898edcda425 (patch) | |
| tree | fedc52c373794a85050d9ab8c8f5aae8c2854928 | |
| parent | PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI (diff) | |
| download | linux-dev-1c4422f22605ec0f4455400c52a31898edcda425.tar.xz linux-dev-1c4422f22605ec0f4455400c52a31898edcda425.zip | |
PCI: xilinx-nwl: Add optional "dma-coherent" property
Add optional dma-coherent property to support coherent PCIe DMA traffic.
Link: https://lore.kernel.org/r/20210222084732.21521-2-bharat.kumar.gogada@xilinx.com
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt index 01bf7fdf4c19..2d677e90a7e2 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt +++ b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt @@ -33,6 +33,8 @@ Required properties: - #address-cells: specifies the number of cells needed to encode an address. The value must be 0. +Optional properties: +- dma-coherent: present if DMA operations are coherent Example: ++++++++ |