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| author |   H. Peter Anvin (Intel) <hpa@zytor.com> | 2021-05-19 14:21:51 -0700 |
|---|---|---|
| committer |   Thomas Gleixner <tglx@linutronix.de> | 2021-05-21 12:36:45 +0200 |
| commit | 283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882 (patch) | |
| tree | 4ac6f53fae6809c9afe18ab6699fcf606f555067 | |
| parent | x86/idt: Remove address argument from idt_invalidate() (diff) | |
| download | linux-dev-283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882.tar.xz linux-dev-283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882.zip | |
x86: Add native_[ig]dt_invalidate()
In some places, the native forms of descriptor table invalidation is
required. Rather than open-coding them, add explicitly native functions to
invalidate the GDT and IDT.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20210519212154.511983-6-hpa@zytor.com
| -rw-r--r-- | arch/x86/include/asm/desc.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h index b8429ae50b71..400c17862870 100644 --- a/arch/x86/include/asm/desc.h +++ b/arch/x86/include/asm/desc.h @@ -224,6 +224,26 @@ static inline void store_idt(struct desc_ptr *dtr) asm volatile("sidt %0":"=m" (*dtr)); } +static inline void native_gdt_invalidate(void) +{ + const struct desc_ptr invalid_gdt = { + .address = 0, + .size = 0 + }; + + native_load_gdt(&invalid_gdt); +} + +static inline void native_idt_invalidate(void) +{ + const struct desc_ptr invalid_idt = { + .address = 0, + .size = 0 + }; + + native_load_idt(&invalid_idt); +} + /* * The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is * a read-only remapping. To prevent a page fault, the GDT is switched to the |