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authorRobin Chen <po-tchen@amd.com>2022-08-08 10:56:17 +0800
committerAlex Deucher <alexander.deucher@amd.com>2022-08-25 13:34:40 -0400
commit28c042707bf23436d4fa3ecc1eab1a62dd1f6d7d (patch)
tree5fa83504dccf6e0be0163533f5b8319bcada4b87
parentdrm/amd/display: change to runtime initialization for reg offsets for DCN321 (diff)
downloadlinux-dev-28c042707bf23436d4fa3ecc1eab1a62dd1f6d7d.tar.xz
linux-dev-28c042707bf23436d4fa3ecc1eab1a62dd1f6d7d.zip
drm/amd/display: Cursor flicker when entering PSRSU
[Why] The DAL driver may transmit the wrong cursor position to PSRSU DMUB driver when there are multiple planes. [How] Currently the driver apply the HW cursor on the top plane. So we should only transmit the cursor position on the top plane to PSRSU DMUB driver. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Robin Chen <po-tchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 5b5d952b2b8c..37246e965457 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -3340,6 +3340,9 @@ static bool dcn10_dmub_should_update_cursor_data(
if (pipe_ctx->plane_state->address.type == PLN_ADDR_TYPE_VIDEO_PROGRESSIVE)
return false;
+ if (dcn10_can_pipe_disable_cursor(pipe_ctx))
+ return false;
+
if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
return true;