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| author |   Dmitry Osipenko <digetx@gmail.com> | 2019-08-12 00:00:43 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2019-10-29 20:29:16 +0100 |
| commit | 3193a063a2cdffc8fe174c5304c567b48947a791 (patch) | |
| tree | cb6df3a813eff61efd995592b13b66b73df95ae4 | |
| parent | ARM: tegra: nyan-big: Add timings for RAM codes 4 and 6 (diff) | |
ARM: tegra: Add External Memory Controller node on Tegra30
Add External Memory Controller node to the device-tree.
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index e38ce88c3133..0e035373b97c 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -733,6 +733,15 @@ #reset-cells = <1>; }; + memory-controller@7000f400 { + compatible = "nvidia,tegra30-emc"; + reg = <0x7000f400 0x400>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA30_CLK_EMC>; + + nvidia,memory-controller = <&mc>; + }; + fuse@7000f800 { compatible = "nvidia,tegra30-efuse"; reg = <0x7000f800 0x400>; |